Article Roundup: Hydrogen Powered Cars, On-Demand DRC with P&R, AV SoC Functional Safety, Automating CDC Verification & Advanced Packaging LVS and LVL issues

Article Roundup: Hydrogen Powered Cars, On-Demand DRC with P&R, AV SoC Functional Safety, Automating CDC Verification & Advanced Packaging LVS and LVL issues

Betting on Hydrogen-Powered Cars On-demand DRC within P&R cuts closure time in half for MaxLinear Functional Safety Verification For AV...
Key Partnership Accelerates the Future of Mobility

Key Partnership Accelerates the Future of Mobility

Advanced integrated circuits (ICs) and system-on-chip (SoC) devices coupled with sophisticated software will be crucial enablers of advanced mobility technologies...
Article Roundup: 5 Major Shifts In Automotive, Full Solution for eMRAM Coming in 2020, Thoroughly Verifying Complex SoCs, The Challenge of Electric and Autonomous Vehicle Service and Maintenance, & The First Must-Have in 5G

Article Roundup: 5 Major Shifts In Automotive, Full Solution for eMRAM Coming in 2020, Thoroughly Verifying Complex SoCs, The Challenge of Electric and Autonomous Vehicle Service and Maintenance, & The First Must-Have in 5G

5 Major Shifts In Automotive Full Solution for eMRAM Coming in 2020 Thoroughly Verifying Complex SoCs The Challenge of Electric...
Mentor at ArmTechCon 2019

Mentor at ArmTechCon 2019

Mentor, a Siemens Business is a Platinum Sponsor for this year’s Arm TechCon. We support the broad range of Arm®-based...
Article Roundup: EDA with AI inside with Joe Sawicki, Neural Network Notions and Tools, The Subtle Shift to “Why not Cloud”, Wally Rhines’ Chapter 8: Value through Differentiation in Semiconductors & Challenges to Building Level 5 Automotive Chips.

Article Roundup: EDA with AI inside with Joe Sawicki, Neural Network Notions and Tools, The Subtle Shift to “Why not Cloud”, Wally Rhines’ Chapter 8: Value through Differentiation in Semiconductors & Challenges to Building Level 5 Automotive Chips.

EDA with ‘AI inside’ – Mentor’s Joe Sawicki offers an insider’s view Wally Rhines: Chapter 8 – Value Through Differentiation...
Article Roundup: Low-Power Design, Smart Electronics Manufacturing, Low-Power Embedded Systems, MEMS Sensing & Mentor’s AI Advancements

Article Roundup: Low-Power Design, Smart Electronics Manufacturing, Low-Power Embedded Systems, MEMS Sensing & Mentor’s AI Advancements

Low-Power Design Becomes Even More Complex Digitalization for Smarter Electronics Manufacturing Low power modes Mentor-Tanner Illuminate MEMS Sensing, Fusion More...
Article Roundup: UPF Commands, IC Waiver Management, Hybrid Emulation, Reset Domain Crossing & Multi-Patterning at Sub-5nm

Article Roundup: UPF Commands, IC Waiver Management, Hybrid Emulation, Reset Domain Crossing & Multi-Patterning at Sub-5nm

Empowering UPF Commands With Effective Elements Lists Automated Waiver Management: Past, Present, and Future Hybrid Emulation Takes Center Stage A...
Article Roundup: Machine Learning Power Consumption, Engineering Ice Cream Machines, Overcoming EV Design Challenges, IC HW-SW Co-Design & PSS

Article Roundup: Machine Learning Power Consumption, Engineering Ice Cream Machines, Overcoming EV Design Challenges, IC HW-SW Co-Design & PSS

Power Is Limiting Machine Learning Deployments The Engineer and the Ice Cream Machine Overcoming systemic design challenges for electric vehicles...
Article Roundup: Accelerate P2P Resistance Debug, Digital Twins for AVs, Optimizing SoC Design Databases, Design for the Intelligent Edge & Medical Delivery Drones

Article Roundup: Accelerate P2P Resistance Debug, Digital Twins for AVs, Optimizing SoC Design Databases, Design for the Intelligent Edge & Medical Delivery Drones

Speed Up P2P Resistance Debugging With Selective Highlighting Digital twin to go the distance Optimize your database with duplicate data...
Article Roundup: Logic BIST in Automotive, Generative Electrical Systems Design, Multicore Embedded Systems, Aerospace Electrical Load Analysis & Predicting Semiconductor Trends

Article Roundup: Logic BIST in Automotive, Generative Electrical Systems Design, Multicore Embedded Systems, Aerospace Electrical Load Analysis & Predicting Semiconductor Trends

Challenges Of Logic BiST In Automotive ICs Engineering creativity using model-based generative tools Enabling embedded multicore systems with multiple OSes...
Article Roundup: SoC Debug, AI/ML, Model-Based Engineering, Automotive IC Test & EDA, IP Grow 16.3%

Article Roundup: SoC Debug, AI/ML, Model-Based Engineering, Automotive IC Test & EDA, IP Grow 16.3%

Debugging Complex SoCs Experts Weigh in on Artificial Intelligence Reshaping the Semiconductor Industry Model-Based Engineering for Wire Harness Manufacturing Automotive...
Article Roundup: Test Chips at Advanced Nodes, AI/ML Processor Design, Circuit Aging, Simulation for AVs & Konica Minolta’s HLS Success

Article Roundup: Test Chips at Advanced Nodes, AI/ML Processor Design, Circuit Aging, Simulation for AVs & Konica Minolta’s HLS Success

Test Chips Play Larger Role At Advanced Nodes Deliver “Smarter” Faster: Design Methodology for AI/ML Processor Design Circuit Aging Becoming...
Article Roundup: Carmakers Creating Custom Chips, the Fourth Industrial Revolution, Using Smaller IC Layouts to Accelerate Design & Verification, Storing Pointers in Unsigned Integers & Open Source Processors

Article Roundup: Carmakers Creating Custom Chips, the Fourth Industrial Revolution, Using Smaller IC Layouts to Accelerate Design & Verification, Storing Pointers in Unsigned Integers & Open Source Processors

In Automotive, A Move From Microcontrollers To Massively Complex SoCs Revolution on the Factory Floor Speed up design and verification...
Article Roundup: Safety and Security in Automotive, Mobile Devices and Moore’s Law, the Rise of AI/ML in the Cloud, and New Tools for AI Design and Verification

Article Roundup: Safety and Security in Automotive, Mobile Devices and Moore’s Law, the Rise of AI/ML in the Cloud, and New Tools for AI Design and Verification

Disregard Safety And Security At Your Own Peril (Experts at the Table, Part 1) Who’s Responsible For Security Breaches? (Experts...
Article Roundup: DFT Moving to RTL, Open-Source EDA, Opportunities and Challenges in Electronics, an AI Accelerator Ecosystem & Calibre in the Cloud

Article Roundup: DFT Moving to RTL, Open-Source EDA, Opportunities and Challenges in Electronics, an AI Accelerator Ecosystem & Calibre in the Cloud

Automotive complexity drives DFT to the RTL Will Open-Source EDA Work? Trends in the Electronics Market are Driving Both Opportunities...
Article Roundup: Mentor’s New AI Capabilities, a High Schooler’s Engineering Crash Course, Easing Aerospace Electrical Compliance & the Future of Electronics Manufacturing

Article Roundup: Mentor’s New AI Capabilities, a High Schooler’s Engineering Crash Course, Easing Aerospace Electrical Compliance & the Future of Electronics Manufacturing

Mentor Extends AI Footprint How a High-Schooler Trying to Save Water Got a Crash Course in Engineering AI and ML...
Article Roundup: The 5th Global Mega Trend, Optimizing for USB 3, Preparing for New Nodes, Managing Design Rules & FPGA Verification

Article Roundup: The 5th Global Mega Trend, Optimizing for USB 3, Preparing for New Nodes, Managing Design Rules & FPGA Verification

Roland Busch, COO & CTO of Siemens: The Fifth Mega Trend That Is Changing Siemens’ Future Optimize USB 3 by...
Article Roundup: Boosting AI Chips with AI, R.I.P. Reset Button, Critical Area Analysis, Preparing Embedded Devices for the IoT & Improving Aircraft Electrical System Certification

Article Roundup: Boosting AI Chips with AI, R.I.P. Reset Button, Critical Area Analysis, Preparing Embedded Devices for the IoT & Improving Aircraft Electrical System Certification

Mentor Juices AI Chips with AI The demise of the reset button How critical area analysis improves yield Enabling embedded...
Article Roundup: Siemens Launches PAVE360 Pre-silicon Autonomous Validation Environment

Article Roundup: Siemens Launches PAVE360 Pre-silicon Autonomous Validation Environment

On May 15 Siemens announced a new pre-silicon autonomous validation environment called PAVE360. PAVE360 provides a comprehensive environment for multi-supplier...
Article Roundup: EDA in AI, Verifying Vehicle E/E Systems, High-Speed PCB Signal Integrity, Designing for the Edge & Digitalization for Electronics Manufacturers

Article Roundup: EDA in AI, Verifying Vehicle E/E Systems, High-Speed PCB Signal Integrity, Designing for the Edge & Digitalization for Electronics Manufacturers

The Role Of EDA In AI Achieving Effective Verification and Validation of Vehicle E/E Systems – Part 4 Signal Integrity...
MENTOR AT DAC 2019

MENTOR AT DAC 2019

The Design Automation Conference (DAC) is the premier conference for automated electronics design and verification technology. For 2019, DAC returns...
Article Roundup: Low-Power Memory, How to Pick an Embedded Processor, DFT for AI, MindSphere Oddities & Optimizing in the Age of Safety and Security

Article Roundup: Low-Power Memory, How to Pick an Embedded Processor, DFT for AI, MindSphere Oddities & Optimizing in the Age of Safety and Security

Boost your DFT efficiency for AI silicon design Target: 50% Reduction In Memory Power What Processor Should I Use? Offbeat...
Article Roundup: Automotive Chip Compliance, Integrated IoT IC Design, IC/ASIC Design Trends, 5nm Collaboration & Cleaner Fireplaces

Article Roundup: Automotive Chip Compliance, Integrated IoT IC Design, IC/ASIC Design Trends, 5nm Collaboration & Cleaner Fireplaces

The Long And Detailed Road To Automotive Compliance Enabling IoT Design with Integrated MEMS/IC Co-Design and Verification The Weather Report:...
Article Roundup: Designer-Centric CFD Simulation, Smarter Verification, Managing DFT for AI Chips, a Global PCB Platform & Formal Verification

Article Roundup: Designer-Centric CFD Simulation, Smarter Verification, Managing DFT for AI Chips, a Global PCB Platform & Formal Verification

Speeding Up Electrical Vehicle Development With Designer-Centric Thermal And Electromagnetic Simulation And Analysis Verify Smarter, Not Harder How To Manage...
Article Roundup: Orlando’s Digital Twins, Verification & Validation of Vehicle E/E Systems, HLS + IP Accelerates Development, the Nuts and Bolts of Verification & Improving Chip Design

Article Roundup: Orlando’s Digital Twins, Verification & Validation of Vehicle E/E Systems, HLS + IP Accelerates Development, the Nuts and Bolts of Verification & Improving Chip Design

How Orlando’s Work With Digital Twins May Change How We Engineer Everything Achieving Effective Verification and Validation of Vehicle E/E...
Article Roundup: Chip Design for New Mobility, Emulation for AI/ML, FPGA Verification Trends, Optimizing Scan-Pattern Ordering & Voltage-Aware DRC

Article Roundup: Chip Design for New Mobility, Emulation for AI/ML, FPGA Verification Trends, Optimizing Scan-Pattern Ordering & Voltage-Aware DRC

Chip Design For The Age Of New Mobility Hardware Emulation Answers AI/ML Verification Needs Trends In FPGA Verification Effort And...
Article Roundup: HLS for AI, an Interview with Dr. Marta Rencz, Qualcomm Achieves Faster Signoff DRC Convergence, and Smart Manufacturing

Article Roundup: HLS for AI, an Interview with Dr. Marta Rencz, Qualcomm Achieves Faster Signoff DRC Convergence, and Smart Manufacturing

High-level synthesis for AI: Part One High-level synthesis for AI: Part Two Interview with Dr. Marta Rencz, Mentor Graphics How...
Article Roundup: Effective Vehicle E/E System Verification, Taming Debug, Software Defined Networking & Power Saving for Embedded Systems

Article Roundup: Effective Vehicle E/E System Verification, Taming Debug, Software Defined Networking & Power Saving for Embedded Systems

Achieving Effective Verification and Validation of Vehicle E/E Systems Achieving Effective Verification and Validation Of Vehicle E/E Systems – Part...
Article Roundup: 5G, Deep Learning, Embedded Interrupts, Hardware-Centric HLS Code Checking & Faster Post-Silicon Debug & Test

Article Roundup: 5G, Deep Learning, Embedded Interrupts, Hardware-Centric HLS Code Checking & Faster Post-Silicon Debug & Test

Gearing Up For 5G Delving into Deep Learning Interrupts in the Nucleus SE RTOS A hardware-centric approach to checking HLS...
Article Roundup: 2019 3D InCites Awards, the Mentor Embedded Linux Launch, Using AI for Security, Optimizing Testbench-to-DUT Connections & VCSEL Tech Taking Off.

Article Roundup: 2019 3D InCites Awards, the Mentor Embedded Linux Launch, Using AI for Security, Optimizing Testbench-to-DUT Connections & VCSEL Tech Taking Off.

A Race to the Finish: Announcing the Winners of the 2019 3D InCites Awards Mentor Embedded Linux launch targets enterprise-class...
Article Roundup: Quickly Merging SoC Layouts, Blockchain for IIoT Security, Verifying 1st Gen AVs, Lua & Automating Analog Design Checking!

Article Roundup: Quickly Merging SoC Layouts, Blockchain for IIoT Security, Verifying 1st Gen AVs, Lua & Automating Analog Design Checking!

Fast, accurate layout merging for SoC flows Blockchain May Be Overkill For Most IIoT Security Paving the Way to Verify...
U2U India: A Summary

U2U India: A Summary

On Feb 21, 2019, Mentor, a Siemens Business hosted User 2 User (U2U) India, the largest user conference in India. The...
Article Roundup: High School Engineer Helps Veteran, Analog Reliability, OpenACC in GCC, Mobile After Moore’s Law & Smart PCB Manufacturing

Article Roundup: High School Engineer Helps Veteran, Analog Reliability, OpenACC in GCC, Mobile After Moore’s Law & Smart PCB Manufacturing

How a high schooler helped an injured veteran get moving again Why Analog Designs Fail Speeding up Programs with OpenACC...
Article Roundup: Efficient IoT Prototyping, High-Sigma Automotive ICs, 3D-IC Innovation, EDA Growth & Maximizing Digital Twin Value

Article Roundup: Efficient IoT Prototyping, High-Sigma Automotive ICs, 3D-IC Innovation, EDA Growth & Maximizing Digital Twin Value

Taking an IoT edge design from proof-of-concept to prototype Automotive IC Design Demands Next-Generation High-Sigma Verification Discontinuities are driving innovation...
Article Roundup: Automotive Electronics Safety, DVCon Rundown, DRC Error Reporting, Qualcomm’s DRC Upgrade & Emulation for AI Verification

Article Roundup: Automotive Electronics Safety, DVCon Rundown, DRC Error Reporting, Qualcomm’s DRC Upgrade & Emulation for AI Verification

How safe is your car? AI, Deep Learning, SystemC, UVM, PSS – DVCon Has it All A better way to...
Article Roundup: Closing Coverage with HLS, Smart AI DFT, Portable Stimulus and You, Automotive IC Reliability & Deep Learning in Semiconductors

Article Roundup: Closing Coverage with HLS, Smart AI DFT, Portable Stimulus and You, Automotive IC Reliability & Deep Learning in Semiconductors

  Closing code coverage with a hardware-aware HLS-to-RTL flow How to be Smart About DFT for AI Chips Verification’s Next...
Mentor at DVCon 2019

Mentor at DVCon 2019

Mentor, a Siemens Business will have experts presenting conference papers and posters, as well as hosting a luncheon, panel, workshop,...
Article Roundup: Generative Design for Automotive Electrical Systems, Emulation for AI, Data Prep & Testing for Big PCBs & Taming Concurrency

Article Roundup: Generative Design for Automotive Electrical Systems, Emulation for AI, Data Prep & Testing for Big PCBs & Taming Concurrency

Applying Generative Design to Automotive Electrical Systems Emulation for AI: Part One Emulation for AI: Part Two Mentor and Seica...
Article Roundup: The Self-Driving Future, Using HLS for AI Processor IP, a New Approach to Resistance Extraction, DC-DC Buck Converter Design & Design Patterns in SystemVerilog OOP

Article Roundup: The Self-Driving Future, Using HLS for AI Processor IP, a New Approach to Resistance Extraction, DC-DC Buck Converter Design & Design Patterns in SystemVerilog OOP

Will Cowboys Or Collaborators Shape The Self-Driving Future? Specialized AI Processor IP Design with HLS A New Approach To Resistance...
Article Roundup: EDA & IP Growth, HLS SLEC, Model-Based Hinting at Sub-20nm, an Integrated PCB Verification Platform & Software approaches to Hardware Verification

Article Roundup: EDA & IP Growth, HLS SLEC, Model-Based Hinting at Sub-20nm, an Integrated PCB Verification Platform & Software approaches to Hardware Verification

EDA, IP Show Strong Growth Sequential Equivalency Checks in HLS Enhanced model-based hinting may be the edge you need below...
Article Roundup: Chip Industry Transition, DFT & Safety Emulation Apps, CMP Simulation, PSS-DSL & Correlating Rule-Based & Field Solver Parasitic Extraction Results

Article Roundup: Chip Industry Transition, DFT & Safety Emulation Apps, CMP Simulation, PSS-DSL & Correlating Rule-Based & Field Solver Parasitic Extraction Results

Chip Industry In Rapid Transition Twin DFT and Mission-Critical Safety Apps for Pre-Silicon Design Verification Tackling Manufacturing Errors Early with...
Article Roundup: Mentor on life with Siemens, What Makes a Chip Successful, Computer Vision, SoC Library Characterization & Debug Tops Verification Tasks

Article Roundup: Mentor on life with Siemens, What Makes a Chip Successful, Computer Vision, SoC Library Characterization & Debug Tops Verification Tasks

Mentor Graphics on life with Siemens (pt1) & Mentor Graphics on life with Siemens (pt2) What Makes A Chip Design...
Article Roundup: SystemVerilog Classes, Mixed-Signal Verification, Production Line Simulations, Advanced Packaging & Embedded Program Structure

Article Roundup: SystemVerilog Classes, Mixed-Signal Verification, Production Line Simulations, Advanced Packaging & Embedded Program Structure

A short course on SystemVerilog classes for UVM verification Cracking The Mixed-Signal Verification Code Automation Simulations for Efficient, Turnkey Solutions...
Article Roundup: Santa’s Autonomous Sleigh, Improving IC Yield Ramp, Silicon Photonics, Custom IC Design Management & HDAP Verification

Article Roundup: Santa’s Autonomous Sleigh, Improving IC Yield Ramp, Silicon Photonics, Custom IC Design Management & HDAP Verification

If Santa had an Autonomous Sleigh Layout schema generation: Improving yield ramp during technology development Realizing the Promise of Silicon...
Article Roundup: PCB Verification in Schematic & Layout, IIoT Architectural Issues, Gender Stereotypes in Tech, Catching HLS Errors Before RTL & the Demise of Reset Buttons

Article Roundup: PCB Verification in Schematic & Layout, IIoT Architectural Issues, Gender Stereotypes in Tech, Catching HLS Errors Before RTL & the Demise of Reset Buttons

Validate Twice, Build Once Architectural Issues for Embedded Devices in the IIoT Overcoming Gender Stereotypes In Tech Catapult Design Checker...
Article Roundup: Automotive-Grade ATPG, Mixed-Signal Verification, AI Accelerators, AV Verification & Library Characterization with Machine Learning

Article Roundup: Automotive-Grade ATPG, Mixed-Signal Verification, AI Accelerators, AV Verification & Library Characterization with Machine Learning

Mentor extends Tessent for debug and automotive pattern generation Nanometer-Scale SoC Mixed-Signal Verification? Who You Gonna Call? What Makes A...
Article Roundup: Mixed Signal Simulation, Public EV Charging, Digital Twins for Smarter Systems, Qualcomm’s P&R Fix & Domain Crossing’s Impact on Safety

Article Roundup: Mixed Signal Simulation, Public EV Charging, Digital Twins for Smarter Systems, Qualcomm’s P&R Fix & Domain Crossing’s Impact on Safety

Mentor’s Symphony in Tune with AMS Designer Needs Streamlining Public EV Charging The Era of Smarter Systems Demands Functionally Accurate...
Article Roundup: Engineering the Perfect Roasted Turkey, Computer Vision Rising, Electric Aircraft Propulsion, Photonics & Verification Trends

Article Roundup: Engineering the Perfect Roasted Turkey, Computer Vision Rising, Electric Aircraft Propulsion, Photonics & Verification Trends

How to Cook a Turkey like an Engineer The Rapid Rise of Computer Vision Siemens Electric Aircraft Propulsion Unit: Inside...