- Mentor extends Tessent for debug and automotive pattern generation
- Nanometer-Scale SoC Mixed-Signal Verification? Who You Gonna Call?
- What Makes A Good AI Accelerator
- 8.8 billion miles to verify
- Improving Library Characterization with Machine Learning!
Mentor extends Tessent for debug and automotive pattern generation
Tech Design Forum
Automotive ICs are under stringent requirements from the ISO 26262 functional safety standard, requiring zero defective parts per million. New automotive-grade ATPG technology from Mentor targets defects at the transistor and interconnect level to help automotive chip manufacturers achieve this goal. Additionally, Mentor’s new ATE-Connect creates a standard interface between test and DFT platforms to improve the silicon bring-up process.
Mixed-signal chips are becoming more popular as they play a key role in IoT, communications, automotive, data centers, and more. Verifying mixed-signal chips has always been difficult, but it is becoming more demanding as designs migrate to cutting-edge process nodes. Mentor’s new Symphony Mixed-Signal Platform provides fast and accurate verification for nanometer-scale mixed-signal ICs to address the challenges of these designs.
What Makes A Good AI Accelerator
The rise of artificial intelligence and machine learning is spurring many companies to develop hardware accelerators that can be optimized for specific types of data. The lack of standardization in accelerators, the dependence of their design on what is being accelerated, and the fact that software evolves faster than hardware all create challenges for companies attempting to join the acceleration race. This article examines these challenges and forecasts how the accelerator market may change in the near future.
8.8 billion miles to verify
Tech Design Forum
Autonomous vehicles will require exhaustive verification and testing to ensure their safety, performance, and functionality before being sent to market. Manufacturers will need to create digital twins of their autonomous vehicles for virtual testing to reach the billions of testing miles required, under millions of potential scenarios. Mentor’s EDA offerings in addition to Siemens broader system-of-systems infrastructure enable the comprehensive virtual testing necessary for autonomous vehicles.
SoC library characterization can become a significant roadblock in the design process as creating a usable library can take up to 100 million simulation runs. Machine learning can improve library characterization by reducing the number of corners that are generated through brute force simulation by thirty to seventy percent, in addition to other benefits. The result is reducing the time required for library generation of standard cells or memories, without sacrificing accuracy.