Semiconductor Packaging

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Monolithic scaling limitations drive the growth of 2.5/3D multi-chiplet, heterogeneous integration that enables PPA targets to be met. Our integrated flow addresses prototyping challenges to signoff for FOWLP, 2.5/3D IC, and other emerging integration technologies.

Learn more about semiconductor packaging design and verification.

Featured posts

Illustration of 3D IC stacked design

3D IC technology: your comprehensive guide to enabling heterogeneous integration

May 19, 2025

What is 3D IC technology? 3D IC technology refers to the integration of multiple silicon dies or wafers in a…

By John McMillan
14 MIN READ
Screen shots of Innovator3D IC software in use.

Exploring TSMC InFO_oS and InFO_PoP certification

February 28, 2025

Siemens EDA has recently achieved this certification for Xpedition Package Designer as part of the TSMC InFO_oS and InFO_PoP workflows.

By Keith Felton
2 MIN READ
Text that says what's new in IC Packaging 2409 next to a stylized X

What’s new in IC Packaging 2409

September 19, 2024

The 2409 release is a landmark update in the field of electronic design automation (EDA), introducing a next-generation solution for…

By Keith Felton
3 MIN READ

Latest posts

Calibre-3DThermal-for-3D-IC-design

Thermal management in 3D IC: Challenges, modeling and design strategies 

January 26, 2026

You are likely here because thermal issues have become the primary constraint shaping your 3D IC design decisions. As 3D integration pushes more performance into smaller footprints, thermal…

By Tova Levy
5 MIN READ
3D IC multiphysics

Ensure 3D IC Multiphysics Reliability for AI Systems at Scale

January 18, 2026

Every new generation of AI systems pushes SoC design teams closer to the end of Moore’s Law. The core question…

By Tova Levy
6 MIN READ
System-technology co-optimization in 3D IC design

What Lies Ahead for System-Technology Co-Optimization (STCO) in 2026

January 15, 2026

The race to build ever more powerful and energy-efficient AI chips has been underway for years, but 2026 is shaping…

By Per Viklund
5 MIN READ
AI in 3D IC design

AI is reshaping the 3D IC design ecosystem: Key trends to watch in 2026

January 15, 2026

Headlines on how the global AI race leads to the shortages of GPUs in no short supply. Behind those headlines…

By Sudarshan Deo
5 MIN READ
Abstract image of a chip. Text that says "What is 3Dblox?"

What is 3Dblox?

January 13, 2026

If you have not heard of it before, 3Dblox is an emerging standard that was first created by TSMC but is now managed by IEEE.

By Keith Felton
2 MIN READ
3D IC thermal challenges and trends 2026

Key Thermal Advances Driving Next-Gen AI Chip Design in 2026

December 15, 2025

AI is hot — literally.  As we bid farewell to a transformative year of 2025, there’s no doubt that the AI chip underwent substantial changes. As AI compute is pushing…

By Andras Vass-Varnai
3 MIN READ
what's new Innovator3D IC 2510

What’s New in Innovator3D IC solution suite release 2510

October 27, 2025

Innovator3D IC solution suite release 2510 marks a groundbreaking first release of the comprehensive Innovator3D IC solution suite.

By Keith Felton
3 MIN READ

From 2.5D to true 3D IC: What’s driving the next wave of integration.​

October 8, 2025

With 3D IC integration blurring the lines between chip and package, is your team’s mindset truly system-centric, or are traditional…

By John McMillan
13 MIN READ
10 steps for successful heterogeneous chiplet integration

Unlock advanced chiplet design success: Discover the Siemens EDA Heterogeneous Integration eBook series

September 25, 2025

The future of semiconductor innovation is rapidly shifting from monolithic chips to advanced, multi-chiplet architectures. As devices demand greater power,…

By Tova Levy
4 MIN READ