Semiconductor Packaging

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Monolithic scaling limitations drive the growth of 2.5/3D multi-chiplet, heterogeneous integration that enables PPA targets to be met. Our integrated flow addresses prototyping challenges to signoff for FOWLP, 2.5/3D IC, and other emerging integration technologies.

Learn more about semiconductor packaging design and verification.

Featured posts

Image of a chip with text that says: High Bandwidth Memory integration

Managing the complexities of High Bandwidth Memory integration in high-performance computing

March 12, 2024

The utilization of High Bandwidth Memory (HBM) has become a cornerstone for high performance computing (HPC) CPUs, GPUs, and AI…

By Keith Felton
2 MIN READ
Taking 2.5D/3D IC physical verification to the next level

Taking 2.5D/3D IC physical verification to the next level

February 21, 2024

Taking 2.5D/3D IC physical verification to the next level. As package designs continue to evolve, so must the verification requirements. Designers working on even the most complex multi-die, multi-chiplet stacked configurations require enhanced checking capabilities to quickly and easily verify that the physical die are placed correctly to ensure proper connectivity and electrical behavior.

By John McMillan
4 MIN READ
Image of a chip on a board with text that says Navigating complexities in power delivery analysis: embracing the shift-left approach

Navigating complexities in power delivery analysis: embracing the shift-left approach

January 9, 2024

The demand for increased power and performance in semiconductor packages has surged. As more die and chiplets are integrated into…

By Keith Felton
2 MIN READ

Latest posts

An image of an IC package design in Xpedition Package Designer with text that says: Achieving substrate supplier fabrication requirements: a designer's guide

Achieving substrate supplier fabrication requirements: a designer’s guide

December 5, 2023

Designing advanced package layouts with large areas of metal can be a daunting task, given the stringent requirements imposed by…

By Keith Felton
3 MIN READ

Understanding 3D IC Technology: Unveiling the Future of Integrated Circuits

November 6, 2023

Delve into the world of 3D IC technology, its architecture, benefits, and applications. Learn how it’s reshaping the future of integrated circuits for enhanced performance and efficiency.

By John McMillan
6 MIN READ
Image of chiplets with text onscreen saying HBM

High Bandwidth Memory (HBM): Unleashing the power of next-gen memory technology

September 28, 2023

In the ever-evolving realm of semiconductor technology, one innovation stands out above the rest: High Bandwidth Memory (HBM). Offering unparalleled…

By Edward Hudson
3 MIN READ
What's new in Xpedition IC Packaging

What’s new in Xpedition IC Packaging VX.2.14

September 19, 2023

The new VX.2.14 release of Xpedition IC Packaging includes improvements and enhancements to both Xpedition Substrate Integrator and Xpedition Package…

By Keith Felton
2 MIN READ

SemiWiki Podcast – An expert panel discussion on the move to chiplets

September 13, 2023

Listen in as Tony Mastroianni Advanced Packaging Solutions Director – Siemens EDA along with Saif Alam Vice President of Engineering…

By John McMillan
< 1 MIN READ
system technology co-optimization

Shifting left with system technology co-optimization for IC packaging

August 17, 2023

We have witnessed and learned about the industry’s significant shift in semiconductors. The traditional approach of transistor scaling, once universally…

By Keith Felton
3 MIN READ
Image of an IC package design with text that says A workflow methodology for homogeneous disaggregation using hierarchical device planning

A workflow methodology for homogeneous disaggregation using hierarchical device planning

July 20, 2023

Advancements in IC packaging manufacturing, combined with the exploding costs of designing monolithic ICs on today’s advanced process nodes, have…

By Chris Cone
5 MIN READ
Image of a boulder in a desert

A “big rock” approach to DC drop analysis in IC package design

June 15, 2023

The key analysis needs of high-performance computing semiconductor package design Today, power requirements are continually increasing as you bring more…

By Steve McKinney
4 MIN READ
Illustration of an IC Package design with text that says Why are you spending 30%+ more time on semiconductor packaging design?

Why are you spending 30%+ more time on semiconductor packaging design?

May 18, 2023

Designs are just getting bigger and more complex Yes, an obvious aspect is increasing design complexity. Packages are now a…

By Keith Felton
2 MIN READ