Semiconductor Packaging

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Monolithic scaling limitations drive the growth of 2.5/3D multi-chiplet, heterogeneous integration that enables PPA targets to be met. Our integrated flow addresses prototyping challenges to signoff for FOWLP, 2.5/3D IC, and other emerging integration technologies.

Learn more about semiconductor packaging design and verification.

Featured posts

Text that says what's new in IC Packaging 2409 next to a stylized X

What’s new in IC Packaging 2409

September 19, 2024

The 2409 release is a landmark update in the field of electronic design automation (EDA), introducing a next-generation solution for…

By Keith Felton
3 MIN READ

Siemens introduces Innovator3D IC – a comprehensive multiphysics cockpit for 3D IC design, verification and manufacturing

July 31, 2024

Innovator3D IC – a comprehensive multiphysics cockpit for 3D IC design, verification and manufacturing

By John McMillan
4 MIN READ
Image showing physical design IP reuse with Xpedition Package designer

Embracing physical design IP reuse as a best practice

July 22, 2024

Efficiency in IC package design is becoming more important as design cycles shorten and complexity surges. One common approach to…

By Keith Felton
2 MIN READ

Latest posts

EE Times Fireside chat: Linking design to manufacturing for a sustainable semiconductor future

October 21, 2024

Listen in as Michael Munsey, VP at Siemens EDA, joins EE Times’ Sally Ward-Foxton for a Fireside chat Q&A session…

By John McMillan
2 MIN READ

User2User 2024: Customer-specific solutions with Siemens EDA tools: Sysberry GmbH

October 15, 2024

The presentation features consulting project examples from Sysberry GmbH that leverage Siemens EDA tools and APIs.

By John McMillan
3 MIN READ

Taking 3DIC heterogeneous integration mainstream

October 2, 2024

In this presentation, we will explore the challenges introduced by 3DIC, the current state of the industry to address those challenges, the ecosystem needed to support 3DIC, and how users today can successfully adopt 3DIC leveraging new solutions, workflows, and 3DIC Design Kits (3DK) from Siemens EDA that are designed specifically with 3DIC in mind.

By John McMillan
3 MIN READ

User2User 2024: Meeting future performance demands through packaging: ChipletZ

September 27, 2024

Learn how 3DIC tech enhances compact, high-performance systems but faces verification challenges. We explore solutions and methodologies, including the use of Siemens XSI and Calibre 3DSTACK.

By John McMillan
4 MIN READ

Enabling comprehensive DFT for chiplets and 3DICs using Tessent Multi-die

September 24, 2024

Learn about Siemens’ Tessent Multi-die solution for 3DIC packaging.

By John McMillan
4 MIN READ
Text that says what's new in IC Packaging 2409 next to a stylized X

What’s new in IC Packaging 2409

September 19, 2024

The 2409 release is a landmark update in the field of electronic design automation (EDA), introducing a next-generation solution for…

By Keith Felton
3 MIN READ
Image of a 3D IC with text that says TSMC 2024 NA OIP Ecosystem Forum

Join us at the TSMC 2024 NA OIP Ecosystem Forum

September 18, 2024

The TSMC 2024 North America OIP (Open Innovation Platform®) Ecosystem Forum is just around the corner, and Siemens EDA is…

By Keith Felton
3 MIN READ

User2User 2024: Silicon photonics to integrate chiplets: Swissbit

September 17, 2024

Swissbit is pioneering chiplet and system-on-package solutions that embed security and functional safety from the design phase to meet stringent requirements in harsh industrial and automotive environments.

By John McMillan
3 MIN READ
User2User 2024: Chiplets for future automotive application: Fraunhofer

User2User 2024: Chiplets for future automotive application: Fraunhofer

September 11, 2024

Andy Heinig, Head of Department Efficient Electronics at Fraunhofer, explains why automotive is especially a good market and enabler for chiplets and presents different use cases for chiplets that are on the horizon.

By John McMillan
3 MIN READ