Calibre IC Design & Manufacturing

Stay ahead with our expert insights on advanced IC design and manufacturing. Discover Calibre verification breakthroughs, yield and process improvement strategies and the latest trends driving performance and efficiency in advanced technologies.

Filter by:

Latest posts

IBM and Siemens: Virtualizing device and manufacturing innovation for the Angstrom Era 

November 9, 2026

IBM and Siemens are researching virtual models of IBM’s nanostack architecture to assess device performance and manufacturing challenges in the angstrom era.

By Calibre IC Design & Manufacturing
3 MIN READ

Improve interconnect robustness with Design Enhancer’s automated via insertion

November 3, 2026

Automated via insertion with Calibre DesignEnhancer Via. Improve interconnect robustness and reduce late signoff iterations in advanced physical design.

By Calibre IC Design & Manufacturing
4 MIN READ

The virtuous cycle of silicon: How Siemens is accelerating the era of Physical AI with NVIDIA cuLitho

October 14, 2026

GPU-accelerated computational lithography with Siemens Calibre and NVIDIA cuLitho By Dr. Jim Shiely, Chief of Staff for Calibre Semiconductor R&D,…

By Calibre IC Design & Manufacturing
4 MIN READ
Top-level schematic of a CMOS Low Dropout voltage regulator. An error amplifier (OA1) drives the gate of a PMOS pass transistor. The critical connection between the amplifier output and the transistor gate is labeled as the "VICTIM" net. The circuit also shows feedback resistors and an output capacitor.

Eliminating the silent killer of analog reliability: A structural approach to floating nets

October 12, 2026

By Bhanu Pandey, Product Engineer, Calibre Design Solutions A successful first silicon run starts with getting the design details right….

By Bhanu Pandey
5 MIN READ

Solving the extraction challenges of CFET and backside power

September 30, 2026

By Karen Chow, Sheetal Veronica, and Kunjesh Agashiwala Introduction: The vertical evolution of semiconductor architecture Both complementary field-effect transistor (CFET)…

By Karen Chow
12 MIN READ

How shift-left memory contention analysis protects performance and schedule

September 1, 2026

Detect memory contention at the schematic level, optimize memory design and improve reliability with Insight Analyzer—advanced analysis for complex memory blocks

By Calibre IC Design & Manufacturing
6 MIN READ

Manufacturing Intelligence: AI in the Fab

September 1, 2026

Discover how AI is fundamentally transforming semiconductor manufacturing, moving beyond traditional limits. Learn how AI tightens feedback loops, tackles bottlenecks, and orchestrates fab operations for unprecedented efficiency and innovation.

By Calibre IC Design & Manufacturing
4 MIN READ

Why curvilinear OPC demands a new optimization approach 

August 24, 2026

The semiconductor industry’s transition to sub-5 nm nodes has fundamentally changed photomask design economics. For years, teams relied on rectilinear…

By Calibre IC Design & Manufacturing
6 MIN READ

From chaos to clarity: Smarter DRC workflows and team productivity with Calibre Vision AI 

August 20, 2026

Advanced node DRC demands rapid team coordination and closure. You can transform your entire DRC workflow by turning massive error data into…

By Calibre IC Design & Manufacturing
5 MIN READ