A touchy subject: RF IC layout verification

By Neel Natekar – Mentor, A Siemens Business Radio frequency (RF) circuitry is an essential…

Breaking it down…How interconnect segmentation helps resolve P2P resistance errors

By Slava Zhuchenya – Mentor, A Siemens Business Point-to-point (P2P) simulations find and report nets…

VLSI optimization—a bridge too far?

source: Andrew Shiva/CC BY-SA 4.0By Sherif Hany – Mentor, A Siemens Business Job without end….

A better, faster, smarter way to insert filler cells in P&R

By Fady Fouad, Jeff Wilson, Esraa Swillam – Mentor, A Siemens Business Filler cells—Those cells…

Early-stage design verification slowing down your schedules? Watch our on-demand web seminar for the solution

You’re integrating your design. Some blocks are incomplete. Others just have placeholders. But you can’t…

Can you picture your EDA in the cloud?

Moving electronic design automation (EDA) design verification to the cloud—we’ve talked about it and written…

Five white papers that could change your life…

By Shelly Stalnaker – Mentor, A Siemens Business Someone once said to me, “You don’t…

The benefits of working together: AUA and Mentor celebrate their long-term collaboration

By Sedrak Sargisian – Mentor, A Siemens Business We recently had the privilege of hosting…

Fixing DFM hotspots with Calibre signoff during design implementation

By Srinivas Velivala – Mentor, A Siemens Business Adding the Calibre RealTime Digital API to…