Design with Calibre

The industry-leading Calibre toolsuite provides physical verification (DRC), circuit verification (LVS, PEX), and reliability verification (PERC), as well as Calibre DFM optimization, to ensure IC designs will deliver the power, performance, and foundry yield today’s markets demand. Across all process nodes and design styles, innovative functionality ensures the Calibre toolsuite provides accurate, efficient, comprehensive IC verification while minimizing resources and tapeout schedules.

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The secret superpower of early design verification

March 2, 2023

By Kesmat Shahin How many times, as you traversed across design stages and ran countless iterations, have you wished that…

By Design With Calibre
2 MIN READ

Help! I’m not an ESD expert! Reducing ESD verification complexity

February 9, 2023

By Abdellah Bakhali If you’re not an electrostatic discharge (ESD) expert (and let’s face it, most of us aren’t), verifying…

By Design With Calibre
3 MIN READ

Automated common resistance checking…it’s the smart thing to do!

January 30, 2023

By Hossam Sarhan Work smarter, not harder. Isn’t that what everyone is always telling you? Of course, it’s excellent advice,…

By Design With Calibre
< 1 MIN READ

A software migration that improves productivity? The Calibre Interactive tool has a (new) GUI for that…

January 26, 2023

By Slava Zhuchenya Software migration can be a dreaded endeavor, especially for electronic design automation (EDA) tools that design companies…

By Design With Calibre
2 MIN READ

Find high resistance faster in P2P violations with interactive P2P analysis

January 16, 2023

By Slava Zhuchenya So your net trace has too much parasitic resistance. Where is it coming from? You ran your…

By Design With Calibre
2 MIN READ

A new method of scaling and efficiency for the semi-manufacturing flow

January 9, 2023

By Beth Martin Calibre sets sail on Kubernetes While most Calibre semi-manufacturing jobs still run on on-premises compute clusters using…

By Design With Calibre
3 MIN READ

Abracadabra! Clearing shorts before full-chip implementation

December 20, 2022

By James Paris and Armen Asatryan  Automated short checking during implementation lets design teams quickly find and fix these errors…

By Design With Calibre
2 MIN READ

Fast, efficient, productive? Your early-stage IC design physical verification can be all that…

December 14, 2022

By John Ferguson and Nermeen Hossam With each new process node comes more complex requirements needed to ensure working silicon. …

By Design With Calibre
2 MIN READ

Infineon and Siemens collaborate for innovation

December 6, 2022

By Karen Chow When Infineon needed to select a field solver for the development of their next-generation power semiconductor products,…

By Design With Calibre
< 1 MIN READ