Design with Calibre

The industry-leading Calibre toolsuite provides physical verification (DRC), circuit verification (LVS, PEX), and reliability verification (PERC), as well as Calibre DFM optimization, to ensure IC designs will deliver the power, performance, and foundry yield today’s markets demand. Across all process nodes and design styles, innovative functionality ensures the Calibre toolsuite provides accurate, efficient, comprehensive IC verification while minimizing resources and tapeout schedules.

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Latest Posts

The path of least resistance…leads to more reliable designs

April 6, 2022

By Derong Yan Meeting tapeout schedules and performance requirements are equally critical conditions for IC design success. Now engineers can…

By Design With Calibre
2 MIN READ

Extracting parasitics from MIM/MOM capacitors doesn’t have to hurt!

April 4, 2022

By Claudia Relyea and Sandeep Koranne  Analog/RF designers need both the speed of rule-based PEX, as well as the capacity…

By Design With Calibre
2 MIN READ

Accelerating IC design time to market with Calibre in the cloud

March 31, 2022

By Michael White When you’re flying, it’s fun to look out the window and see clouds from “the other side.”…

By Design With Calibre
2 MIN READ

Ease on down the road…why “ease of use” is the next big thing in EDA, and how we get there

March 16, 2022

Ease of use is an important issue when enhancing product functionality and introducing new technology. Calibre Design Systems considers ease…

By Design With Calibre
4 MIN READ

DRC voltage text annotations: Manually placed texts can be wrong!

March 14, 2022

By Abdellah Bakhali System-on-chip (SoC) designs often use multiple intellectual property (IP) blocks from multiple IP providers. Each IP provider…

By Design With Calibre
2 MIN READ

Do you trust the reliability of your 2.5D/3D IC package designs?

March 9, 2022

By Dina Medhat 2.5D/3D ICs have become an innovative solution for many design and integration challenges. Basic physical verification for…

By Design With Calibre
3 MIN READ

Reliability checking for memory circuit design doesn’t have to destroy your eyesight!

March 7, 2022

By Hossam Sarhan Memory blocks contain sensitive analog circuits that are crucial for the proper functionality of the whole design….

By Design With Calibre
< 1 MIN READ

DAC in December?? A Review of Calibre Design Solutions at DAC 2021

March 3, 2022

Did it feel a bit weird to be submitting research papers for DAC 2022 while packing to go to DAC…

By Design With Calibre
4 MIN READ

Is there a quick and easy way to calculate P2P resistance or current density between any two coordinates in my IC design layout?

February 28, 2022

By Li Li Why, yes, there is! As you know, Calibre® PERC™ logic-driven layout (LDL) current density (CD) and point-to-point…

By Design With Calibre
< 1 MIN READ