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Open letter to the IC design community

Joseph Sawicki – executive vice president, Mentor IC EDA Access free 30-Day On-Demand Training, plus…

Smoothing the path to manufacturing success begins with CMP simulation and fill optimization

By Ruben Ghulghazaryan, Davit Piliposyan, Zhengfang Liu, Chunshan Du, Jeff Wilson, Qijian Wan, Xinyi Hu,…

Innovations in physical verification and cloud computing keep the IC industry moving forward

By John Ferguson – Mentor, A Siemens Business Faced with growing technological complexity, EDA companies…

The path of least resistance…leads to more reliable designs

By Derong Yan – Mentor, A Siemens Business Meeting tapeout schedules and performance requirements are…

Extracting parasitics from MIM/MOM capacitors doesn’t have to hurt!

By Claudia Relyea, Revanth Reddy Pappireddy, and Sandeep Koranne – Mentor, A Siemens Business Analog/RF…

More data is better in P2P debugging

By Slava Zuchenya – Mentor, A Siemens Business P2P debugging taking too much time? Using…

Building the bridge between GDS and OASIS

By Dennis Joseph – Mentor, A Siemens Business Switching from GDS to OASIS format can…

Getting to tapeout faster… and easier!

By Sherif Hany – Mentor, A Siemens Business Complex reliability checks blowing your verification schedule?…

Do you trust your AI/ML chips?

By Neel Natekar – Mentor, A Siemens Business AI/ML chips are seeing growing adoption, but…