Latest Posts

Cloud Computing Makes Overnight TAT Attainable

By Matthew Hogan and Derong Yan As we all know, during the final sign-off verifications…

Companies talk about how mPower enables their tape-out success

By Joe Davis Earlier this week, we introduced our new mPower product line for power…

We know…power integrity analysis can be a really big pain, especially for really big designs

By Joe Davis Design teams use power integrity analysis to determine if the circuits in…

Don’t like standing in lines? Get with the (right) programs!

By John Ferguson For a while, it appeared that the worst of the COVID pandemic…

Get rid of GUI frustration and speed up your Calibre verification job submissions!

By Slava Zhuchenya Graphical user interface (GUI) frustration is real. Deployment of integrated circuit (IC)…

Seeing is believing (and learning)…

Are you a visual learner? Lots of folks are—they understand and retain instructions much more…

Caution! Avoid detours when improving resistance on ESD paths

By Derong Yan As overall transistor dimensions shrink, integrated circuit (IC) chip designs become more…

Custom layout designers…Want to know a secret? You can close DRC faster. A lot faster…

By Srinivas Velivala Design rule checking (DRC) closure is a “tax” that custom layout designers…

So you think you know symmetry? Think again…

By Sherif Hany “The Art of Analog Layout” is one of the canonical books addressing…