Latest posts

Unraveling the 3DIC shift left strategy: Navigating the world of multi-dimensional ICs

By John Ferguson IC design’s evolution continues to push the boundaries of Moore’s law to new heights. One of the…

Mastering parasitic extraction at the 3 nm process node

By Dilan Heredia and Karen Chow Designing integrated circuits (ICs) for the 3 nm process node poses challenges never seen…

Why PID issues matter to IC chip designers, and how to combat them

By Derong Yan Integrated circuit (IC) chip designers are constantly striving to meet ever-increasing standards of reliability and performance in…

Shifting left with Calibre solutions: Enhancing IP design flow efficiency and design quality

By Terry Meeks Designing integrated circuits (ICs) is a multifaceted task that requires the integration of various components, including intellectual…

Revolutionizing software testing: Introducing TCP-Net++

By Mohamed Abdelkarim and Reem El Adawi In the dynamic world of software development, balancing speedy delivery with quality assurance…

ERC softchk features

StreamliningIC design verification with Calibre® nmLVS Recon™

By Kesmat Shahin As integrated circuits (ICs) become more complex, meeting tapeout schedules has become increasingly challenging. Statistics from industry…

3DICs and the multi-physics challenge

By John Ferguson Design teams have known since, well, pretty much forever that mechanical stresses and temperature changes can affect…

Elevating user experience with UX maturity models

By Kirolos George and Reem El Adawi In today’s digital landscape, user experience (UX) plays a crucial role in the…

Inspiring the next generation of EDA engineers

As the semiconductor market grows, so does the need for qualified engineers throughout the semiconductor ecosystem. Of course, the supply…