Latest posts

Calibre xACT takes a hybrid approach to parasitic extraction

By Mark Tawfik Parasitic extraction plays a pivotal role in the design and optimization of integrated circuits (ICs). Extraction involves…

Smart strategies for metal fill extraction

By Shehab Ashraf As semiconductor technology continues to scale, the impact of parasitic effects from metal fill structures has become…

Solving inter-domain leakage challenges: Enhancing IC design with Insight Analyzer

By Charlie Olson Design reliability remains a top priority for engineers in the world of semiconductor technology. One critical challenge…

Smarter DRC for complex designs: Accelerating verification with Calibre nmDRC Recon

By John Ferguson The challenge: Traditional DRC can’t keep up… Increasing complexity and automation in IC design have made traditional…

Screenshot of the Calibre Interactive GUI showing multiple job submissions.

Easily manage multiple verification jobs with Calibre

Calibre Multiple Job Submission GUI helps you optimize your IC design verification As the complexity of integrated circuits (ICs) continues…

Siemens shines at the 2025 SPIE Advanced Lithography + Patterning symposium

The SPIE Advanced Lithography + Pattering symposiums were held 23-27 February this year with the usual enthusiastic and sizable attendance…

Solving IR drop and layout bottlenecks: How Calibre DesignEnhancer streamlines IC design

By Jeff Wilson As an IC designer, you know that achieving an optimal layout is about more than just meeting…

Transforming pre-layout IC reliability analysis with Siemens Insight Analyzer

By Matthew Hogan As the industry continues to push the boundaries of what’s possible in IC design, the need for…

Unlocking post-tapeout flow scalability and performance with cloud computing

By Bassem Riad As process geometries continue to shrink, computational lithography demands increasingly powerful and abundant CPU resources to support…