Latest Posts

Verification run configurations stressing you out? Automate them!

By Srinivas Velivala – Mentor, A Siemens Business As all new IC verification engineers learn…

Help! I’m not an ESD expert! Reducing ESD verification complexity

By Abdellah Bakhali – Mentor, A Siemens Business If you’re not an ESD expert (and…

Using machine learning to improve DFM: a case study

By Ruben Ghulghazaryan, Davit Piliposyan, Misak Shoyan – Mentor, A Siemens Business It has been…

SAFE at home! Attending the Samsung SAFE forum in 2020

By Shelly Stalnaker – Mentor, A Siemens Business Samsung is going virtual with their 2020…

Do you have a reliable automated waiver process for reliability verification?

By Dina Medhat – Mentor, A Siemens Business Design rule waivers Maybe a design rule…

Direct write DEF is DEFinitely the way to go for DFM back-annotation

By Armen Asatryan, James Paris – Mentor, A Siemens Business DFM back-annotation to P&R Back-annotation…

How to get to Win-Win-Win in conflict management

By Dennis Joseph – Mentor, A Siemens Business Anyone who’s been through conflict management training…

SAMP series finishes with SAMP cut mask decomposition techniques

By David Abercrombie and Rehab Kotb Ali – Mentor, A Siemens Business We’ve been writing…

A touchy subject: RF IC layout verification

By Neel Natekar – Mentor, A Siemens Business Radio frequency (RF) circuitry is an essential…