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Navigating the complex world of resistance extraction for curvilinear shapes in IC designs

By Nada Tarek As integrated circuit (IC) designs continue to push the boundaries of what’s possible, we’re seeing an explosion…

Optimal ESD protection with Calibre PERC and Solido Simulation Suite

By Neel Natekar Integrated circuit (IC) reliability engineers face the dual challenge of ensuring robust electrostatic discharge (ESD) protection without…

Cloud Flight Plans enable cost-effective use of the cloud for peak productivity

By Chris Clee You might ask, “What on Earth is a Cloud Flight Plan?” It’s a collection of best practices…

Faster design verification with Calibre nmLVS Recon Compare

By Wael ElManhawy Layout versus schematic (LVS) comparison is a fundamental step in integrated circuit (IC) design verification. It ensures…

Cracking the code: ensuring reliability and performance in IC design with EM/IR analysis

By Karen Chow and Joel Mercier Integrated circuits (ICs) are everywhere, powering everything from washing machines and TVs to medical…

Shift left for more efficient block design and chip integration

Block/chip integration is a lot more complicated than it gets credit for. On the face of it, chip integration just…

Speeding up early design rule checking with Calibre nmDRC Recon

By John Ferguson and Nermeen Hossam Chip designers are very aware of how time-consuming early design rule checking (DRC) can…

Automated analysis-based layout enhancements reduce power grid voltage drops during place & route: A case study with Google

By Jeff Wilson Power isn’t just a small factor in the IC design arena—it’s a cornerstone. Design teams work to…

Accelerate IP design cycles and reduce costs with Calibre design stage verification

By Terry Meeks In the fast-paced world of semiconductor design, time is a critical asset. One way IC designers save…