Design with Calibre

The industry-leading Calibre toolsuite provides physical verification (DRC), circuit verification (LVS, PEX), and reliability verification (PERC), as well as Calibre DFM optimization, to ensure IC designs will deliver the power, performance, and foundry yield today’s markets demand. Across all process nodes and design styles, innovative functionality ensures the Calibre toolsuite provides accurate, efficient, comprehensive IC verification while minimizing resources and tapeout schedules.

Latest posts

Siemens shares mPower best new software in 2022 awards with TSMC

June 20, 2023

By Michael Buehler-Garcia In 2022, the mPower EM/IR power analysis solution from Siemens EDA received the following awards: In reality,…

By Design With Calibre

< 1 MIN READ

Cross-platform database validation: Don’t add applications without it!

April 25, 2023

By James Paris The OASIS* database format is a widely used industry standard in electronic design automation (EDA) software for…

By Design With Calibre

< 1 MIN READ

Why take chances with your PV job setups when a winning alternative is available?

April 18, 2023

By Richard Yan Are you interested in optimizing your integrated circuit (IC) physical verification (PV) flows? How does automating the…

By Design With Calibre

2 MIN READ

How can I run reliability checks early in the design cycle?

April 11, 2023

By Hossam Sarhan and Alexandre Arriordaz With the increasing complexity of design layouts and shorter tapeout cycles, waiting until signoff…

By Design With Calibre

2 MIN READ

Siemens EDA celebrates 20 years of collaboration with imec

March 28, 2023

By Germain Fenger, Director of Product Management RET modelingCalibre Semiconductor Manufacturing solutions This year marks the 20th anniversary of the…

By Design With Calibre

3 MIN READ

First out of the (3DIC) box: How Siemens EDA is using the TSMC 3Dblox standard to change 3DIC verification

March 27, 2023

By John Ferguson In recognition of the growing need for a more holistic approach to three-dimensional integrated circuit (3DIC) design,…

By Design With Calibre

2 MIN READ

A novel methodology for EM assessment in on-power grids can improve power, time-to-market, and design cost

March 9, 2023

By Valeriy Sukharev, Armen Kteyan, Jun-Ho Choy Achieving an accurate assessment of electromigration (EM)-induced failure is essential to developing a…

By Design With Calibre

2 MIN READ

The secret superpower of early design verification

March 2, 2023

By Kesmat Shahin How many times, as you traversed across design stages and ran countless iterations, have you wished that…

By Design With Calibre

2 MIN READ

Help! I’m not an ESD expert! Reducing ESD verification complexity

February 9, 2023

By Abdellah Bakhali If you’re not an electrostatic discharge (ESD) expert (and let’s face it, most of us aren’t), verifying…

By Design With Calibre

3 MIN READ