- Automotive complexity drives DFT to the RTL
- Will Open-Source EDA Work?
- Trends in the Electronics Market are Driving Both Opportunities and Challenges: How do we address them?
- Providing An AI Accelerator Ecosystem
- #56thDAC Discussion on Calibre in the Cloud Brings Sunshine to SOC Developers
Automotive complexity drives DFT to the RTL
Tech Design Forum
The advancement of automotive electronics is causing engineers to address design for test (DFT) as a system problem at the RTL level, instead of waiting until the gate level. A major driver of this trend is the push towards fully self-driving vehicles. This technology requires ICs on the most advanced process nodes that meet stringent safety requirements, causing DFT to adopt more advanced nodes than usual.
Will Open-Source EDA Work?
Increased interest in open-source hardware is causing the EDA industry to reconsider open-source tools. The U.S. Defense Advanced Research Projects Agency (DARPA) is a primary sponsor of this effort, with the goal of reducing the cost of chip design. Whether the EDA industry embraces the concept enough to ensure its success, however, has yet to be determined.
Electronic devices are more personalized and portable than ever as consumers demand custom experiences that they can take anywhere. The demand is driving smaller products with more features and functionality. To keep up, technology companies have to shift their design and manufacturing from single-part number mass production to flexible products manufactured in small lot sizes.
Providing An AI Accelerator Ecosystem
Machine learning (ML) algorithms that can be accelerated in hardware are an important design area in AI systems. Traditional RTL-based design flows are too inflexible for this fast-moving segment where design requirements change frequently. A high-level synthesis flow can help teams adapt to these changes with more agility, but a new AI ecosystem takes this a step farther by providing IP libraries, support, and toolkits.
EDA applications in the cloud has long seemed like a natural combination to tackle the daunting compute challenges of designing next-generation chips. In particular, the cloud has the potential to significantly increase throughput for DRC runs. At the 56th Design Automation Conference, Mentor hosted a panel discussing their cloud solution for Calibre, along with key partners TSMC, Microsoft, and AMD.