- Will Cowboys Or Collaborators Shape The Self-Driving Future?
- Specialized AI Processor IP Design with HLS
- A New Approach To Resistance Extraction For Unconventional Geometries
- Designing a fully digitally controlled DC-DC buck converter
- Design patterns in SystemVerilog OOP for UVM verification
Will Cowboys Or Collaborators Shape The Self-Driving Future?
When fully autonomous vehicles hit the road, it will be the culmination of years of research, engineering effort, and investment. Some believe that the success of autonomous cars will rely solely on the quality, safety, and performance of their self-driving systems. However, others view the rise of smart city technology as the real fulcrum to the self-driving future.
Chips&Media’s latest computer vision IP is designed to detect objects in real time using a deep neural network. To achieve this design, the company needed a design tool that enabled rapid architectural exploration to optimize the design and reduce time-to-market. Chips&Media selected Catapult HLS due to the quality of RTL it generates, its ability to target multiple technologies and processes, and its robust pre-simulation verification.
IC designers are using a greater number of unconventional metal structures due to technology scaling and increased interest in integrated imaging functionality. Unconventional structures tend to be wider and squarer than traditional signal routing metal, and usually require a field solver for resistance extraction. This article presents a new method for resistance extraction on these unconventional structures that increases efficiency to provide accurate results more quickly.
Advanced IC designs contain multiple voltage domains and even use dynamic voltage scaling to reduce power consumption. Matching power supply to demand is the job of voltage converters, which are becoming increasingly digital to reduce the size of the design and bill-of-materials, and integrate into SoC packages. This article presents a case study that explores the changing role of DC/DC converters in today’s ICs, and the effect this has on their design.
Design patterns in SystemVerilog OOP for UVM verification
Electronic Design Network
SystemVerilog supports templates for writing generic code using parameterized classes. These templates are called design patterns, and are language-independent, optimized, and reusable templates for solving common programming problems. This article describes some of the design patterns that make up the UVM base class library.