Article Roundup: SystemVerilog Classes, Mixed-Signal Verification, Production Line Simulations, Advanced Packaging & Embedded Program Structure

  1. A short course on SystemVerilog classes for UVM verification
  2. Cracking The Mixed-Signal Verification Code
  3. Automation Simulations for Efficient, Turnkey Solutions
  4. Design For Advanced Packaging
  5. Program structure and real time


A short course on SystemVerilog classes for UVM verification
EDN Network

Languages often contain words that can mean different things depending on the context in which they are used. SystemVerilog is no different. In SystemVerilog, the term “class” is used to describe the makeup of an object, and thus may refer to a number of things such as class type, class object and so on. This article attempts to clarify the usage and meaning of “class” in SystemVerilog and object oriented programming.


Cracking The Mixed-Signal Verification Code
SemiEngineering

Digitization in IoT, automotive, industrial, and other applications is driving a new wave of growth in semiconductors. Mixed-signal designs play a critical role in this growth as they connect the digital and analog worlds; however, verifying these designs is additionally challenging. The Symphony Verification Platform is the fastest and most flexible verification solution for mixed signal designs.


Automation Simulations for Efficient, Turnkey Solutions
Engineering.com

Designing a full production line is a complicated and potentially risky task. To ensure the system functions properly before building the entire system, many companies create full digital models of the systems, known as digital twins, for simulation and testing. This article covers how SoluTech, a manufacturer of custom industrial automation solutions, uses Siemens software to design and test machines and systems.


Design For Advanced Packaging
SemiEngineering

Advanced packaging may be a replacement or augmentation to Moore’s Law as monolithic device scaling becomes more expensive. Advanced packaging techniques place additional strain on design and verification flows that vary by the type of advanced packaging being used. To meet these needs, EDA companies are developing new tools for advanced packaging design and verification.


Program structure and real time
Embedded.com

What are embedded systems, and how do operating systems play a role in their design and operation? Colin Walls examines embedded systems and the difference between real-time operations and the desktop applications with which most people are familiar.

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/expertinsights/2019/01/03/article-roundup-systemverilog-classes-mixed-signal-verification-production-line-simulations-advanced-packaging-embedded-program-structure/