Webinar – Optimize manycore AI and ML designs

Turn complexity into a competitive advantage by harnessing system-level data to optimize manycore AI and ML chips. Our new on-demand…

Tessent SystemInsight: simultaneous analysis of hardware and software in complex SoC designs

Newly renamed and upgraded, the Tessent™ SystemInsight integrated development environment (IDE) now supports cycle-accurate processor trace and a range of…

Manage automotive test, safety, and security with a safety island

The makers of automotive ICs are living in “interesting times.” These ICs no longer only run simple functions such as window…

Join Tessent at the VOICE Developer Conference

Tessent invites you to join us at the upcoming VOICE Developer Conference happening virtually from June 21-23, 2021. VOICE is…

Learn about on-chip monitoring and analysis with Tessent Embedded Analytics SDK

Large and complex SoCs with embedded systems play a big role in the technology we depend on, from intelligent 5G…

Read the 2020 ITC paper: Tessent Streaming Scan Network

At the 2020 International Test Conference, a paper by scientists from Siemens Digital Industries Software and Intel, describes how the…

RealizeLIVE + User2User

Don’t miss these Tessent sessions at Realize LIVE + User2User event – May 26, 2021

Explore the latest DFT, operations and embedded analytics technologies at Realize LIVE + U2U 2021. The May 26, 2021 user…

Manage the effects of chip complexity with Embedded Analytics

By Richard Oxland – Siemens Digital Industries Software If you’ve never heard of Embedded Analytics, it’s time to learn how…

VTS 2020 best paper_Tessent

Tessent wins Best Paper award at IEEE VLSI Test Symposium

The best paper of the 2020 symposium describes a layout-friendly EDT decompressor that reduces routing congestion associated with decompressor circuitry…