Recognition of Tessent’s excellence in next-generation system-on-chip and 3DIC design enablement.
Siemens EDA takes industry partnerships seriously, and sometimes we like to draw attention to our successes. In this case, we are proud to announce that Siemens just received three 2021 TSMC OIP Partner of the Year awards for next-generation design enablement.
Recognition from our partners means we are helping our customers succeed, which drives everything we do. For this year’s achievements, TSMC recognized Siemens in the following categories:
- “Joint Development of 4nm Design Infrastructure” for the optimization of Siemens’ Calibre® nmPlatform software and Analog FastSPICE Platform
- “Joint Development of Cloud-Based Productivity Solution” for Siemens’ Calibre nmDRC solution
- “Joint Development of 3DFabric™ Design Solutions” for collaboration on Siemens’ Xpedition™ Substrate Integrator, Xpedition Package Designer, HYPERLYNX™, Calibre 3DStack/nmDRC/nmLVS/xACT and Tessent™ solutions.
Siemens’ Tessent group partnered with TSMC to build a Design for Testability (DFT) flow for TSMC’s 3D silicon stacking architecture. The Tessent DFT solution is based on hierarchical DFT, SSN packetized, bus-based test delivery (Streaming Scan Network), enhanced TAPs (test access ports) and IEEE 1687 IJTAG network technologies, all of which are IEEE 1838 compliant. Designed for scalability, flexibility and ease-of-use, the Tessent solution helps customers optimize resources associated with IC test technology.
To learn more, watch this video recording from ITC 2021 on 3DIC test by Tessent’s Interlock and Foundry Program Manager, Wu Yang: