An Automated Solution for Voltage-Aware DRC

An Automated Solution for Voltage-Aware DRC

By Dina Medhat, Mentor Graphics Automated voltage propagation with Calibre PERC makes it easier to comply with voltage-aware DRC spacing…

Resetting Expectations on Multi-Patterning Decomposition and Checking Part 2

Resetting Expectations on Multi-Patterning Decomposition and Checking Part 2

By David Abercrombie, Mentor Graphics Triple and quadruple patterning can baffle even the most experienced designers. David Abercrombie has some…

Electromigration and IC Reliability Risk

Electromigration and IC Reliability Risk

By Dina Medhat, Mentor Graphics Gradual damage from electromigration can affect product performance and reduce product lifetimes. Reliability analysis ensures…

You’re Not Alone

You’re Not Alone

By Srinivas Velivala, Mentor Graphics Calibre How-To videos replace your roadblocks with fast solutions for tricky verification problems

Resetting Expectations on Multi-Patterning Decomposition and Checking

Resetting Expectations on Multi-Patterning Decomposition and Checking

By David Abercrombie, Mentor Graphics Some common misconceptions about multi-patterning processes and just how they work.

LEF/DEF IO Ring Check Automation

LEF/DEF IO Ring Check Automation

By Matthew Hogan, Mentor Graphics Designing today’s complex system-on-chips (SoCs) requires careful consideration when planning input/output (IO) pad rings…  

Correct by Construction and Other Myths

Correct by Construction and Other Myths

By Joseph Davis, Mentor Graphics Is “correct by construction” a myth?

Why Do We Need Assembly Design Kits for Packages?

Why Do We Need Assembly Design Kits for Packages?

By John Ferguson and Tarek Ramadan, Mentor Graphics Why do we need assembly design kits for IC packages?

Reported Death of Moore’s Law Premature?

Reported Death of Moore’s Law Premature?

By Michael White, Mentor Graphics Is Moore’s Law dying? A look at the latest process node activity and technology