Latest Posts

Calibre and the Semiconductor Ecosystem

The Semiconductor Ecosystem- It is the definition of “High Tech”, but it isn’t just about technology, there are two other…

Collaboration and innovation thrive on diversity

Back in November 2019, just a few short months before we all began an enforced year of isolation and separation,…

What is critical area analysis and why should I care?

By Simon Favre What makes money in the semiconductor industry? A killer IC design? Something so innovative that it blows…

Adaptive Patterning: Moving with the times (and technologies)

By John Ferguson and Kevin Rinebold Deca Technologies’ Adaptive Patterning technology and their newly-announced adaptive patterning design kit (APDK) have…

Building a strong reliability foundation with Calibre PERC

By Matthew Hogan How are you handling your reliability verification right now? Custom reliability verification? No reliability verification? How confident…

Machine learning-enabled closed loop DFM

SPIE-ing at a distance…

The SPIE Advanced Lithography Digital Forum took place Feb 22-26, and of course, Siemens EDA was there! We wouldn’t miss…

Early circuit verification can get you to tapeout faster…here’s how

For the last few years, it’s been hard to see design teams struggling to meet tapeout schedules caused by increasing…

Automated ESD protection verification for 2.5-3D ICs is now a reality

Got the mid-winter blahs? The post-New Year letdown? Looking for something to rev you up? How about an automated method…

Stochasticity of the input current is an important factor in accurate EM assessment for on-chip power delivery networks

At every conference, there is always that anticipatory moment just before the coveted “Best Paper” awards are announced. After all,…