Latest posts

What’s an ESD design window, and why do I care?

By Derong Yan As we move to advanced semiconductor process nodes, electrostatic discharge (ESD) issues have become more critical in…

Can you spot the difference?

By James Paris We’ve all played those “Spot the Difference” games where you look at two similar images and try…

Outta my way – electrons coming through!

By Joel Mercier and Karen Chow Ever been in a hurry to get to a meeting, but there were a…

Papers and posters and prizes…oh my! Siemens EDA at DAC59!

By Shelly Stalnaker The Design Automation Conference of 2022 has come to an end. As the dust settles, and the…

Custom & digital layout designers…Use the Calibre RealTime Platform to close DRC fixes faster.

By Srinivas Velivala Douglas Adams, who wrote The Hitchhiker’s Guide to the Galaxy, once said of deadlines, “I love deadlines….

LVS Zero to Hero in 3 Easy Steps

By James Paris When it comes to system-on-chip (SoC) physical verification turnaround-time, layout vs. schematic (LVS) verification can make or…

Improve your layout load time without capital investment?

By Roger Kang How many times has this happened to you—you waited for an hour to complete the loading of…

Direct write DEF is DEFinitely the way to go for DFM back-annotation

By Armen Asatryan, James Paris DFM back-annotation to P&R Back-annotation of DFM changes to P&R databases can be a pain….

Interactive symmetry checking for analog/custom ICs: Faster, easier, more accurate

By Sara Khalaf While the reliability and performance of multiple types of designs such as analog, MEMs, and image sensors…