Parasitic Extraction for Accurate Signal Integrity Analysis at Advanced Nodes

Parasitic Extraction for Accurate Signal Integrity Analysis at Advanced Nodes

By Karen Chow, Mentor Graphics Signal integrity analysis at advanced nodes requires new and enhanced parasitic extraction techniques

Parasitic extraction for touchscreen designs

Parasitic extraction for touchscreen designs

By Mohamed ElRefaee, Mentor Graphics Accurate parasitic extraction of touchscreens is essential for ensuring the high-quality performance the market demands

Extraction Challenges Grow in Advanced Nanometer IC Design

Extraction Challenges Grow in Advanced Nanometer IC Design

By Carey Robertson, Mentor Graphics The Calibre xACT platform is a new type of extraction tool that provides a range…

Parasitic Extraction of FinFET-based Memory Cells

Parasitic Extraction of FinFET-based Memory Cells

By Karen Chow, Mentor Graphics Accurate and efficient FinFET characterization requires a parasitic extraction tool that can apply different extraction…

Designing and Testing FinFet-based IC Designs

Designing and Testing FinFet-based IC Designs

By Carey Robertson and Steve Pateras, Mentor Graphics Are your processes ready for finFETs?

What about MEMS?

What about MEMS?

By Carey Robertson, Mentor Graphics With circuit performance driven by capacitance values, accurate calculations are critical for MEMs designers.

Are multi-patterning corners for parasitic extraction really necessary for 16/14 nm?

Are multi-patterning corners for parasitic extraction really necessary for 16/14 nm?

By Karen Chow, Mentor Graphics How does multi-patterning impact parasitic extraction? How many corners do you really need?