Taming the Verification Debug Monster

Taming the Verification Debug Monster

Join us for the Verification Academy Live Seminar on Enterprise Debug & Analysis Your designs are larger and more complex…

Part 6: The 2016 Wilson Research Group Functional Verification Study

Part 6: The 2016 Wilson Research Group Functional Verification Study

FPGA Language and Library Trends This blog is a continuation of a series of blogs related to the 2016 Wilson…

Part 5: The 2016 Wilson Research Group Functional Verification Study

Part 5: The 2016 Wilson Research Group Functional Verification Study

FPGA Verification Technology Adoption Trends This blog is a continuation of a series of blogs related to the 2016 Wilson…

Part 4: The 2016 Wilson Research Group Functional Verification Study

Part 4: The 2016 Wilson Research Group Functional Verification Study

FPGA Verification Effectiveness Trends This blog is a continuation of a series of blogs related to the 2016 Wilson Research…

Prologue: The 2016 Wilson Research Group Functional Verification Study

Prologue: The 2016 Wilson Research Group Functional Verification Study

This is the first in a series of blogs that presents the findings from our new 2016 Wilson Research Group…

UVM: The Value of Flexibility

UVM: The Value of Flexibility

Having been deeply involved with Universal Verification Methodology (UVM) from its inception, and before that, with OVM from its secret-meetings-in-a-hidden-hotel-room…

No to Know VIP – Validated!

No to Know VIP – Validated!

We have talked about how one can go from ‘No to Know VIP’ in my 3 part series and how…

No to Know VIP – Part 3

No to Know VIP – Part 3

Thus far we have talked about the importance of having a VIP which is easy to connect to the DUT…

UVM Forum 2015 LIVE!

UVM Forum 2015 LIVE!

Verification Academy Brings “UVM Live” to the Santa Clara Convention Center For everyone involved in the functional verification of electronic…