by Rich Edelman and Dave Rich Introduction The UVM is a derivative of OVM 2.1.1. It has similar use model,…
Open SystemC Initiative Tackles the Future If you have examined the DVCon program, you know that it is a week…
By now you’ve probably heard that Accellera approved the Universal Verification Methodology Standard (UVM1.0) today. This announcement is the culmination…
Somebody asked me a simple question: Why do need two different macros (`ovm_object_utils and `ovm_object_param_utils) to register classes with the…
IEEE Standards Association Hosts Design Automation Standardization Workshops in Bangalore & Delhi I, along with several other individuals, will participate…
Standard Co-Emulation Modeling Interface (SCE-MI) 2.1 Improves Verification Productivity The Accellera Interface Technical Subcommittee (ITC) completed version 2.1 of the…
Hi Everyone, Just wanted to let you know that the latest edition of our Verification Horizons newsletter is available here….
As the saying goes: Those who fail to plan, plan to fail. With that said, I am excited to announce…
23rd Synopsys EDA Interoperability Forum Features a Verification Session with focus on the UVM Register Package As readers of the…
