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The Art of Deprecation

The Art of Deprecation

At a recent SystemVerilog requirements gathering meeting,I was quite amused to see “deprecating features” come out as one of the…

OVM 2.1.1 Now Ready for Download

OVM 2.1.1 Now Ready for Download

Download OVM 2.2.1 from Verification Academy An important OVM update is now available for download and production use.  Several bugs…

February 2010 Verification Horizons Newsletter Now Available

February 2010 Verification Horizons Newsletter Now Available

For those of you who didn’t make it to DVCon this year, you missed one of the things that makes…

IEEE Standards Meetings in India

IEEE Standards Meetings in India

EDA & VLSI Standards Focus Meeting on 12 March 2010  As part of its continuing program to reach out to…

I Do It …

I Do It …

… To Advance Technology for Humanity  It is a humbling honor to have been elected chair of the IEEE Standards…

SystemVerilog: A time for change? Maybe not.

SystemVerilog: A time for change? Maybe not.

The SystemVerilog IEEE 1800-2009 Language Reference Manual (LRM) was published a few months ago with an unprecedented 472 updates. That’s…

Partners Offer Support for OVM 1.0 Register Package

Partners Offer Support for OVM 1.0 Register Package

Duolog Joins Agnisys to Add Reg Pac Support The OVM 1.0 Register Package has had a lot of interest since…

SystemC Day at DVCon

SystemC Day at DVCon

SystemC User Group Meeting & DVCon Tutorial Featured The Open SystemC Initiative (OSCI), an independent non-profit organization dedicated to support…

OVM/VMM Interoperability Kit: It’s Ready!

OVM/VMM Interoperability Kit: It’s Ready!

3 – 2 – 1 – DOWNLOAD! As I mentioned in a previous blog, the Accellera OVM/VMM Interoperability kit code…