Semiconductor Packaging

Filter by:

Monolithic scaling limitations drive the growth of 2.5/3D multi-chiplet, heterogeneous integration that enables PPA targets to be met. Our integrated flow addresses prototyping challenges to signoff for FOWLP, 2.5/3D IC, and other emerging integration technologies.

Learn more about semiconductor packaging design and verification.

Featured posts

Illustration of 3D IC stacked design

3D IC technology: your comprehensive guide to enabling heterogeneous integration

May 19, 2025

What is 3D IC technology? 3D IC technology refers to the integration of multiple silicon dies or wafers in a…

By John McMillan
14 MIN READ
Screen shots of Innovator3D IC software in use.

Exploring TSMC InFO_oS and InFO_PoP certification

February 28, 2025

Siemens EDA has recently achieved this certification for Xpedition Package Designer as part of the TSMC InFO_oS and InFO_PoP workflows.

By Keith Felton
2 MIN READ
Text that says what's new in IC Packaging 2409 next to a stylized X

What’s new in IC Packaging 2409

September 19, 2024

The 2409 release is a landmark update in the field of electronic design automation (EDA), introducing a next-generation solution for…

By Keith Felton
3 MIN READ

Latest posts

​3D IC technology trends: how advanced IC packaging is changing the semiconductor industry

May 21, 2025

The semiconductor industry is rapidly evolving with 3D IC technology and advanced packaging solutions revolutionizing chip design and manufacturing. In…

By John McMillan
7 MIN READ
Illustration of 3D IC stacked design

3D IC technology: your comprehensive guide to enabling heterogeneous integration

May 19, 2025

What is 3D IC technology? 3D IC technology refers to the integration of multiple silicon dies or wafers in a…

By John McMillan
14 MIN READ
chiplet integration with STCO system technology co optimization

Resolving Design Fragmentation Challenges in Chiplet Integration with STCO

May 11, 2025

Are you struggling to integrate chiplets into an advanced packaging platform due to design fragmentation challenges? The complexity of managing…

By Tova Levy
< 1 MIN READ
Siemens Xcelerator X with a 3D PCB inside

What’s new in IC Packaging 2504

April 24, 2025

To help design teams stay ahead of the curve, Siemens has released the comprehensive 2504 update for its Innovator3D IC (i3D) and Xpedition Package Designer (xPD) solutions.

By Keith Felton
4 MIN READ
Siemens Innovator 3D IC wins 3D InCites award for 2025

Siemens Innovator3D IC wins 2025 3D InCites Technology Enablement award

April 2, 2025

In the fast-evolving landscape of semiconductor technology, innovation and collaboration are key drivers of progress. As advanced interconnect and packaging…

By Tova Levy
2 MIN READ
Heterogeneous integration eBook IC Packaging

How can IC and package designers navigate the complexities of heterogeneous integration?

March 19, 2025

Heterogeneous integration has transformed the design of complex devices, enabling engineers to swiftly and affordably create advanced system-in-packages by combining…

By Tova Levy
2 MIN READ

Accelerate IC design innovation with Siemens: Navigating the future of 3D IC design to manufacturing

March 7, 2025

In the rapidly evolving semiconductor industry, the drive towards miniaturization and the integration of complex functions through advanced packaging and…

By John McMillan
3 MIN READ
Screen shots of Innovator3D IC software in use.

Exploring TSMC InFO_oS and InFO_PoP certification

February 28, 2025

Siemens EDA has recently achieved this certification for Xpedition Package Designer as part of the TSMC InFO_oS and InFO_PoP workflows.

By Keith Felton
2 MIN READ

3D IC design solutions: 2024 – Year in review

December 16, 2024

Welcome to a look back at a landmark year in 3D IC technology — 2024 was nothing short of revolutionary!…

By John McMillan
3 MIN READ