Siemens EDA Blogs

Siemens EDA’s mission is to help you engineer a smarter future faster. Read our latest blog posts to keep up to date on the latest tools, trends, methodologies and offerings in IC, advanced packaging and PCB systems electronics design, verification and manufacturing.

Calibre IC Design & Manufacturing

Want a better, faster way to write reliability rules and checks? Try an XML constraint file!

August 30, 2019

By Dina Medhat – Mentor, A Siemens Business XML constraint files are the better, faster way to define Calibre PERC...

By Calibre IC Design & Manufacturing

Electronic Systems Design

RF Design Challenges for PCB: Are you ready for 5G for IoT? - After the Webinar Podcast

August 28, 2019

Microwave electrical design is not new to the industry, it’s been around since the 1940’s. However very few designers have...

By Brent Klingforth

Tessent Solutions

DFT for AI chips draws a crowd at ITC India tutorial

August 27, 2019

At the recently concluded ITC India conference, Mentor experts presented the two highest-attended tutorials. One tutorial was AI Chip Technologies...

By Tessent Solutions

HLS Design & Verification Blog

Synthesizing Hardware From Software

August 22, 2019

Excerpt from article: “Synthesizing Hardware From Software” In the past, many co-processor solutions have been dogged by communications costs. “There...

By nileshthiagarajan

Tessent Solutions

How-to implement hierarchical DFT on Arm cores

August 20, 2019

The new reference flow jointly developed by Arm and Mentor for hierarchical DFT and ATPG with Tessent is described in...

By Tessent Solutions

Calibre IC Design & Manufacturing

SoC integration issues? Now you can find them earlier, and fix them faster

August 13, 2019

By Nermeen Hossam and John Ferguson – Mentor, A Siemens Business Our Calibre Recon tool helps SoC teams quickly find...

By Calibre IC Design & Manufacturing

Tessent Solutions

DFT architectural tips: the importance of reference flows

August 13, 2019

This video, the last in a series of three, discusses the Tessent platform capabilities and the reference flows, test cases,...

By Tessent Solutions

HLS Design & Verification Blog

Determining Where Power Analysis Matters Most

August 08, 2019

Excerpt from article: “Determining Where Power Analysis Matters Most” Getting more granular with power Krishnaswamy noted that RTL power vs. gate...

By nileshthiagarajan

Tessent Solutions

DFT architectural tips: use of boundary scan chain during ATPG

August 05, 2019

DFT designers often use boundary scan chains for 1149.1 or 1149.6 interconnect tests. This video provides tips on how to...

By Tessent Solutions