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The Fill Ecosystem Evolves Again

The Fill Ecosystem Evolves Again

August 25, 2015

By Jeff Wilson, Mentor Graphics At 20nm, new fill constraints drive up the time and complexity of the fill process….

By Design With Calibre
6 MIN READ
Extraction Challenges Grow in Advanced Nanometer IC Design

Extraction Challenges Grow in Advanced Nanometer IC Design

July 21, 2015

By Carey Robertson, Mentor Graphics The Calibre xACT platform is a new type of extraction tool that provides a range…

By Design With Calibre
7 MIN READ
Automated Chip Polishing Can Make Your Design Shine

Automated Chip Polishing Can Make Your Design Shine

July 14, 2015

By Bill Graupp, Mentor Graphics A more robust design creates a more reliable product, and reduces yield variability over its…

By Design With Calibre
4 MIN READ
IoT, Cost-per-Transistor Extend Lifetimes of Established Technology Nodes

IoT, Cost-per-Transistor Extend Lifetimes of Established Technology Nodes

June 23, 2015

By Michael White, Mentor Graphics Much of the Internet of Things (IoT) functionality we crave is more cost-effective when implemented…

By Design With Calibre
6 MIN READ
Balancing on the Color Density Tightrope

Balancing on the Color Density Tightrope

May 26, 2015

By David Abercrombie Potential pitfalls and available solutions.

By Design With Calibre
9 MIN READ
Rule Deck Comparison Doesn’t Have to be Difficult

Rule Deck Comparison Doesn’t Have to be Difficult

May 19, 2015

By Saunder Peng Comparing results from different rule decks can be frustrating. Learn how you can use a chip finishing…

By Design With Calibre
5 MIN READ
2-5X Productivity Improvement in 14FDSOI Layout Design: STMicroelectronics Experience with Calibre RealTime

2-5X Productivity Improvement in 14FDSOI Layout Design: STMicroelectronics Experience with Calibre RealTime

March 2, 2015

By Atul Bhargava and Mehak Malhotra, STMicroelectronics, India and Srinivas Velivala, Mentor Graphics Rather than just fixing DRC errors as…

By Design With Calibre
6 MIN READ