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Resetting Expectations on Multi-Patterning Decomposition and Checking Part 2

Resetting Expectations on Multi-Patterning Decomposition and Checking Part 2

January 25, 2016

By David Abercrombie, Mentor Graphics Triple and quadruple patterning can baffle even the most experienced designers. David Abercrombie has some…

By Calibre IC Design & Manufacturing
12 MIN READ
You’re Not Alone

You’re Not Alone

January 12, 2016

By Srinivas Velivala, Mentor Graphics Calibre How-To videos replace your roadblocks with fast solutions for tricky verification problems

By Calibre IC Design & Manufacturing
4 MIN READ
Resetting Expectations on Multi-Patterning Decomposition and Checking

Resetting Expectations on Multi-Patterning Decomposition and Checking

December 28, 2015

By David Abercrombie, Mentor Graphics Some common misconceptions about multi-patterning processes and just how they work.

By Calibre IC Design & Manufacturing
9 MIN READ
Design Rule Checking for Silicon Photonics

Design Rule Checking for Silicon Photonics

November 17, 2015

By Ruping Cao, Mentor Graphics Verifying silicon photonics designs requires new techniques, like equation-based DRC

By Calibre IC Design & Manufacturing
9 MIN READ
MEMS Technology and Manufacturing on the Microscale

MEMS Technology and Manufacturing on the Microscale

October 27, 2015

By Carey Robertson and Khaled AbouZeid, Mentor Graphics Designers incorporating MEMS devices into high-volume CMOS ICs need new processes, data,…

By Calibre IC Design & Manufacturing
6 MIN READ
Electrical Overstress Detection and Debugging

Electrical Overstress Detection and Debugging

September 29, 2015

By Dina Medhat, Mentor Graphics Automated voltage propagation provides an accurate way to detect and correct those hard-to-find EOS conditions…

By Calibre IC Design & Manufacturing
5 MIN READ
Case Studies in P&R Double Patterning Debug: Part Two

Case Studies in P&R Double Patterning Debug: Part Two

September 22, 2015

David Abercrombie continues his expert advice to P&R and chip finishing engineers on understanding and debugging multi-patterning errors accurately and…

By Calibre IC Design & Manufacturing
8 MIN READ
Case Studies in Double-Patterning Debug: Part One

Case Studies in Double-Patterning Debug: Part One

September 15, 2015

By David Abercrombie, Mentor Graphics Multi-patterning errors in P&R layouts can be intricate, and their solutions may not be obvious

By Calibre IC Design & Manufacturing
10 MIN READ
The Changing (and Challenging) IC Reliability Landscape

The Changing (and Challenging) IC Reliability Landscape

September 8, 2015

By Matthew Hogan, Mentor Graphics Reliability issues have gone way beyond DRC and LVS verification…

By Calibre IC Design & Manufacturing
6 MIN READ