mPower power integrity analysis solution recognized for innovation and market impact

By Joe Davis Sponsored by France’s ElectroniqueS magazine, the Electrons d’Or Award program identifies the most innovative products of the…

Struggling to verify the reliability of your multiple-power-domain designs?

By Hossam Sarhan With the growing complexity of system-on-chip designs and technology scaling, multiple power domains are needed to optimize…

Google, AMD, and Siemens EDA walk into a cloud…

By Michael White At DAC this past July, I had the opportunity to sit down with Phil Steinke from AMD…

What’s an ESD design window, and why do I care?

By Derong Yan As we move to advanced semiconductor process nodes, electrostatic discharge (ESD) issues have become more critical in…

Can you spot the difference?

By James Paris We’ve all played those “Spot the Difference” games where you look at two similar images and try…

Outta my way – electrons coming through!

By Joel Mercier and Karen Chow Ever been in a hurry to get to a meeting, but there were a…

Papers and posters and prizes…oh my! Siemens EDA at DAC59!

By Shelly Stalnaker The Design Automation Conference of 2022 has come to an end. As the dust settles, and the…

Custom & digital layout designers…Use the Calibre RealTime Platform to close DRC fixes faster.

By Srinivas Velivala Douglas Adams, who wrote The Hitchhiker’s Guide to the Galaxy, once said of deadlines, “I love deadlines….

LVS Zero to Hero in 3 Easy Steps

By James Paris When it comes to system-on-chip (SoC) physical verification turnaround-time, layout vs. schematic (LVS) verification can make or…