Cloud Computing Makes Overnight TAT Attainable

By Matthew Hogan and Derong Yan As we all know, during the final sign-off verifications of full chip system-on-chip (SoC)…

Don’t like standing in lines? Get with the (right) programs!

By John Ferguson For a while, it appeared that the worst of the COVID pandemic was behind us. My mind…

Get rid of GUI frustration and speed up your Calibre verification job submissions!

By Slava Zhuchenya Graphical user interface (GUI) frustration is real. Deployment of integrated circuit (IC) physical and circuit verification decks…

Seeing is believing (and learning)…

Are you a visual learner? Lots of folks are—they understand and retain instructions much more easily when they can watch…

Caution! Avoid detours when improving resistance on ESD paths

By Derong Yan As overall transistor dimensions shrink, integrated circuit (IC) chip designs become more sensitive to the damage caused…

Custom layout designers…Want to know a secret? You can close DRC faster. A lot faster…

By Srinivas Velivala Design rule checking (DRC) closure is a “tax” that custom layout designers must pay at all process…

So you think you know symmetry? Think again…

By Sherif Hany “The Art of Analog Layout” is one of the canonical books addressing concepts behind layout design techniques…

Can we just agree that perception is everything? Especially in IC design?

By Dennis Joseph Is the dress black and blue, or white and gold? Is that a rabbit or a duck?…

2.5/3D IC designers! Don’t get hung up on latch-up!

By Dina Medhat Latch-up is modeled as a short circuit (low-impedance path) that occurs in an integrated circuit (IC). It…