Design with Calibre

The industry-leading Calibre toolsuite provides physical verification (DRC), circuit verification (LVS, PEX), and reliability verification (PERC), as well as Calibre DFM optimization, to ensure IC designs will deliver the power, performance, and foundry yield today’s markets demand. Across all process nodes and design styles, innovative functionality ensures the Calibre toolsuite provides accurate, efficient, comprehensive IC verification while minimizing resources and tapeout schedules.

Latest posts

Whither goest 3D-IC?

November 27, 2018

By John Ferguson – Mentor, A Siemens Business Assembly-level design kits may be a critical factor in the emergence of…

By Design With Calibre

2 MIN READ

When is a DRC error not an error?

November 19, 2018

By John Ferguson – Mentor, A Siemens Business Error waivers are the dark matter of IC verification—they cancel out DRC…

By Design With Calibre

2 MIN READ

The best things come in small packages

November 13, 2018

By John Ferguson – Mentor, A Siemens Business Do you know what the three challenges of HDAP design are? Are…

By Design With Calibre

2 MIN READ

Eye charts aren’t the answer to analog design reliability…

November 6, 2018

By Hossam Sarhan and Alexandre Arriordaz – Mentor, A Siemens Business Adding Calibre PERC automated reliability checks to the analog…

By Design With Calibre

2 MIN READ

Apples, oranges, pears, and lemons…comparing rule-based PEX to field solver results can be fruitless if you’re not careful

October 30, 2018

By Yousry ElMaghraby – Mentor, A Siemens Business Need to validate your rule-based PEX against a field solver solution? Better…

By Design With Calibre

2 MIN READ

It’s okay to be pushy!

October 23, 2018

By James Paris – Mentor, A Siemens Business Get the full benefit of parallel design implementation by pushing block-level contextual…

By Design With Calibre

2 MIN READ

Here’s a set of candidates everyone can support!

October 16, 2018

By Wael ElManhawy – Mentor, A Siemens Business Do you debug sub-20nm layouts? Want to make your life easier? Adopt…

By Design With Calibre

2 MIN READ

Shocking news! HDAPs need system-level electrical analysis to ensure performance

October 9, 2018

By Tarek Ramadan – Mentor, A Siemens Business As the use of HDAP grows, so does the need for post-layout…

By Design With Calibre

2 MIN READ

Fixing DRC errors in SADP designs at sign-off—Nobody said it was easy (but it can be easier…and much faster)

October 2, 2018

By David Abercrombie – Mentor, A Siemens Business SADP + DRC = headaches? Not any longer. GLOBALFOUNDRIES and Mentor collaborated…

By Design With Calibre

2 MIN READ