The SPIE Advanced Lithography Digital Forum took place Feb 22-26, and of course, Siemens EDA was there! We wouldn’t miss one of the premier events for the lithography community, even if we did have to attend from our home offices this year. In addition to listening to keynote speakers discuss challenges in the industry, our own experts were busy presenting new solutions across a wide range of topics, including optical and EUV lithography, patterning technologies, metrology, process integration for semiconductor manufacturing, and more.
Siemens EDA staff authored or co-authored eight papers:
- Better prediction on patterning failure mode with hotspot aware OPC modeling
- A study on various curvilinear data representations and their impact on mask manufacturing flow
- Fast rigorous modeling of photoresist in lithography
- Advanced ILT solutions to manufacture Si-photonics designs
- A quantified approach of dataset selection for training ML models on hard-to-classify patterns
- Applying machine learning methods to accelerate advanced process node yield ramp
- Guard-banding of IP against topography sensitivity using silicon calibrated CMP model
- Gaussian Random Field EUV stochastic models, their generalizations and lithographically meaningful stochastic metrics
If you’re interested in learning more about our work in any of these fields, let us know! Call us at 1-800-547-3000, or send us a note telling us what topics you’d like more information about.