By Mark Tawfik Parasitic extraction plays a pivotal role in the design and optimization of integrated circuits (ICs). Extraction involves…
By Shehab Ashraf As semiconductor technology continues to scale, the impact of parasitic effects from metal fill structures has become…
By Charlie Olson Design reliability remains a top priority for engineers in the world of semiconductor technology. One critical challenge…
By John Ferguson The challenge: Traditional DRC can’t keep up… Increasing complexity and automation in IC design have made traditional…
Calibre Multiple Job Submission GUI helps you optimize your IC design verification As the complexity of integrated circuits (ICs) continues…
The SPIE Advanced Lithography + Pattering symposiums were held 23-27 February this year with the usual enthusiastic and sizable attendance…
By Jeff Wilson As an IC designer, you know that achieving an optimal layout is about more than just meeting…
By Matthew Hogan As the industry continues to push the boundaries of what’s possible in IC design, the need for…
By Bassem Riad As process geometries continue to shrink, computational lithography demands increasingly powerful and abundant CPU resources to support…