Design with Calibre

The industry-leading Calibre toolsuite provides physical verification (DRC), circuit verification (LVS, PEX), and reliability verification (PERC), as well as Calibre DFM optimization, to ensure IC designs will deliver the power, performance, and foundry yield today’s markets demand. Across all process nodes and design styles, innovative functionality ensures the Calibre toolsuite provides accurate, efficient, comprehensive IC verification while minimizing resources and tapeout schedules.

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Optimize design databases by deleting duplicate data

Optimize design databases by deleting duplicate data

July 9, 2019

By James Paris – Mentor, A Siemens Business Are you suffering from data inefficiency? Learn how you can remove data…

By Design With Calibre
2 MIN READ
Automated full-chip ESD protection verification is here!

Automated full-chip ESD protection verification is here!

June 21, 2019

By Frank Feng – Mentor, A Siemens Business Full-chip ESD verification can be challenging, especially at advanced nodes. Adopting logic-driven,…

By Design With Calibre
2 MIN READ
Stronger, better, earlier latch-up protection? Yes, please!

Stronger, better, earlier latch-up protection? Yes, please!

June 14, 2019

By Flint Yoder – Mentor, A Siemens Business Tight schedules? Worried about product reliability? Now you can find and eliminate…

By Design With Calibre
2 MIN READ
Focus on this…Faster, more accurate litho hotspot detection with machine learning

Focus on this…Faster, more accurate litho hotspot detection with machine learning

June 7, 2019

By Wael ElManhawy and Joe Kwan – Mentor, A Siemens Business Faster, more accurate lithographic hotspot detection with fast LFD…

By Design With Calibre
2 MIN READ
Calibre in the Cloud

Calibre in the Cloud

May 22, 2019

While the practice of using cloud resources to run software jobs is certainly not new, its use for EDA tool…

By Design With Calibre
< 1 MIN READ
Today’s ERC demands new verification capabilities to ensure product reliability and performance

Today’s ERC demands new verification capabilities to ensure product reliability and performance

May 8, 2019

By Derong Yan – Mentor, A Siemens Business Today’s advanced ERC requires an EDA tool that can automatically understand complex…

By Design With Calibre
2 MIN READ
Sharpening your focus…Removing irrelevant data during P2P debugging

Sharpening your focus…Removing irrelevant data during P2P debugging

April 22, 2019

By Slava Zhuchenya – Mentor, A Siemens Business Want to minimize resource and load times, while improving P2P resistance debugging?…

By Design With Calibre
2 MIN READ
Sometimes you just want less – Splitting IC layouts saves time and resources

Sometimes you just want less – Splitting IC layouts saves time and resources

April 16, 2019

By Dennis Joseph – Mentor, A Siemens Business One slice instead of the whole pizza. One single 1¼“ nail, not…

By Design With Calibre
2 MIN READ
Packaging custom checks standardizes and simplifies reliability verification

Packaging custom checks standardizes and simplifies reliability verification

April 10, 2019

By Hossam Sarhan, Mentor – A Siemens Business Using a packaged checks flow lets designers quickly select, configure and run…

By Design With Calibre
2 MIN READ