Part 11: The 2014 Wilson Research Group Functional Verification Study

ASIC/IC Power Trends This blog is a continuation of a series of blogs related to…

Part 6: The 2014 Wilson Research Group Functional Verification Study

FPGA Language and Library Trends This blog is a continuation of a series of blogs…

An Agile Evolution in SoC Verification Panel @ DAC

This year we are trying something new at the Verification Academy booth during next week’s…

Part 4: The 2014 Wilson Research Group Functional Verification Study

FPGA Verification Effectiveness Trends This blog is a continuation of a series of blogs related…

Part 3: The 2014 Wilson Research Group Functional Verification Study

FPGA Effort Verification Trends (Continued) This blog is a continuation of a series of blogs…

ARM® Techcon Paper Report: How Microsoft Saved 4 Man-Months Meeting Their Coverage Closure Goals Using Automated Verification Management & Formal Apps

Few verification tasks are more challenging than trying to achieve code coverage goals for a…

The FPGA Verification Window Is Open

My Feb. 4 post introduced Mentor Graphics’ three-step FPGA verification process intended to help design…

DVCon–The FREE Side

Psst!  I’ll let you in on some news… While DVCon calls the free portion of…

Just because FPGAs are programmable doesn’t mean verification is dead

Marketing teams at FPGA vendors have been busy as the silicon nanometer geometry race escalates….