System Standards Worlds Initiate Unification Accellera, who brought us SystemVerilog, and the Open SystemC Imitative (OSCI), who brought us SystemC…
Language and Library Trends This blog is a continuation of a series of blogs, which present the highlights from the…
The standards developing organizations defining and updating front-end EDA standards will be at DAC in force. And from the looks…
User Adoption of OVM Featured; Views on UVM Discussed The Mentor Graphics user group meeting, User-2-User, in Santa Clara is…
Standard Co-Emulation Modeling Interface (SCE-MI) 2.1 Improves Verification Productivity The Accellera Interface Technical Subcommittee (ITC) completed version 2.1 of the…
23rd Synopsys EDA Interoperability Forum Features a Verification Session with focus on the UVM Register Package As readers of the…
Mentor/Synopsys Collaboration Bears Fruit Two weeks back I shared information in a blog on collaboration between Mentor Graphics and Synopsys…
Mentor Announces Collaboration with Synopsys on Joint Register Package Candidate Mentor has recently teamed with Synopsys to collaborate on the…
Now that the Accellera VIP-TSC has released UVM-EA, effectively narrowing the choice of verification methodologies to UVM or OVM, many…
