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The Many Flavors of Equivalence Checking: Part 5, Summary of the Most Popular LEC and SLEC Use Cases

As I noted at the beginning of this series, the term “logic equivalence checking” (LEC)…

Safety Analysis: We all need something to lean on

In my last post (Colliding Worlds of Safety Analysis), I highlighted the challenges facing safety…

Get Your Bits Together

After my last webinar on SystemVerilog arrays, I received several questions on the differences between…

Colliding Worlds in Safety Analysis

Traditionally failure mode identification has been an expert driven exercise with a failure mode commonly…

DAC 2020: A Rare Virtual Opportunity in Professional Development!

Probably one of the most important pieces of advice I ever received was given to…

DVCon US 2020 Now Available Online

I am happy to share with you that all of the content presented at DVCon…

SystemVerilog Multidimensional Arrays

You asked and I listened Thank you everyone who registered and attended my webinar on…

Getting Organized with SystemVerilog Arrays

SystemVerilog has many ways to store your data. Vectors, arrays, structures, classes, and probably several…

PCIe Gen5: A pathway to address Data Explosion and Emerging Technologies

As the technology scales or shrinks, there are always some bottlenecks that need to be…