Decoding LLM Hallucinations: Insights and Taming them for EDA Applications

What are Large Language Model’s hallucinations. LLMs will be powerful EDA productivity tool once we know what caused it and how to deal with their adverse effects.

Siemens EDA at the 60th DAC

Please mark your calendars for the highly anticipated 60th anniversary Design Automation Conference (DAC). The 60th DAC will take place…

UVM Debug? Just nature doing what it does

Bent Tools and other Horrors From the Garden and UVM Debug – or Are You Still Debugging with $display?

I can’t take credit for the great flowers in the garden. It’s the tremendous rain we’ve had in California this…

ML for Verification

Big Data for Verification – Inspiration from Large Language Models

The importance of verification data learned from training Large Language Models. In DVCon will share an overview of ML applications in verification and . present VIQ tutorial on how data can empower verification, with demos of existing ML applications.

DVCon U.S. 2023: Expanded Accellera content

DVCon U.S. 2023 will be full of opportunities to learn about advances in design and verification technology as it returns…

To UVM Config or Not at DVCON US – Can chatGPT do it better?

It’s all about speed and productivity for Verification Engineers and Designers. And of course, the UVM is the ticket, and…

ML for Verification

Unleashing the Power of Verification Data with Machine Learning

Importance of data in verification can never be underestimated, start building data assets and unlock the value with Machine Learning.

Re-imagining requirements management for safety-critical projects

Project teams face a host of challenges when developing semiconductors compliant to a safety critical market. Whether that’s ISO 26262…

IEEE Honors Tom Fitzpatrick

At the IEEE Standards Association’s 2022 winter awards ceremony, Tom Fitzpatrick was honored for his leadership in standards development and…