Industrial-Grade AI in EDA: From Promise to Practice — A Siemens Panel at DAC 2025

Industrial-Grade AI in EDA

Generative AI: The Hype, The Hope, The Hard Truths — And the Debate at DAC

The semiconductor industry is no stranger to bold claims. But few topics today spark more debate — or more genuine…

Questa One Functional Safety

Accelerated Safety Assurance with Questa One Functional Safety Solution

Explore how the Questa One Functional Safety Solution delivers accelerated safety assurance

From Rule-Based Beginnings to AI-Driven Design: Tracing the Evolution of AI in EDA

As we gear up for the 62nd Design Automation Conference (DAC) in San Francisco, one of the most anticipated events…

Questa One DFT Verification

DFT Verification: Tackling the evolving challenges

Technological advancement continues as a blistering pace, and the demand for highly reliable systems is paramount across various industries. Safety…

User2User

Closing the Gap in Software Skills for Verification Engineers

I’m excited to announce next month’s U2U (User-to-User) meeting, followed by a crucial technical training session that no hardware verification…

Accellera announces fee-free availability of IEEE Std. 1801™-2024

Accellera announced the latest revision of the IEEE Standard for Design and Verification of Low-Power Energy-Aware Electronic Systems, also known…

Backpacking Yosemite Aug 2024

Got Coverage?

Welcome to 2025. What happened?! “Coverage” in August in Yosemite backpacking has a different meaning. In August? Snow? Lots of…

DVCon 2025: A must for hardware design and verification engineers

I’ve attended every DVCon US conference since its inception, over 30 years ago. I’ve also given keynotes at DVCon India….