Thought Leadership

DVCon 2025: A must for hardware design and verification engineers

I’ve attended every DVCon US conference since its inception, over 30 years ago. I’ve also given keynotes at DVCon India. Now I’m the DVCon US vice program chair and am looking forward to being the program chair in 2026. I can honestly say this conference is an unparalleled opportunity for design and verification engineers. DVCon U.S. 2025 continues to uphold the DVCon reputation as the premiere event for our community, offering a unique venue to learn, network, and exchange ideas face-to-face.

Why DVCon is Essential:

  1. Cutting-Edge Knowledge: DVCon consistently features the latest advancements in design and verification. From insightful keynotes to technical sessions, you will gain valuable insights into emerging trends and technologies that are shaping our industry.
    • Technical Presentation sessions
      • Low-power/UPF
      • Functional Safety
      • AI/ML in Verification and Coverage Closure
      • Regression Management
      • Formal Verification
      • Universal Verification Methodology in Practice
      • Coverage Modeling
      • Verification IP
      • Analog Mixed-signal Modeling
      • Automated Testbench Generation.
    • Interactive poster session: Don’t miss the  poster session, featuring papers that couldn’t fit into the fixed presentation slots. I find this an even better opportunity to engage with the authors in a more interactive setting..
  2. Networking Opportunities: The conference brings together professionals from around the globe, providing an ideal chance to connect with peers, industry leaders, and potential collaborators.
  3. Hands-On Workshops: One of the highlights of DVCon is the hands-on workshops. These sessions allow you to dive deep into specific tools and methodologies, enhancing your practical skills and knowledge.
  4. Exhibition Hall: The sold-out exhibition hall features the latest tools, technologies, and services. It’s a great place to discover new solutions that can streamline your workflow and improve your projects. 

Having attended every DVCon U.S. since it began, I can attest to the immense value it brings to our professional lives. It’s not just a conference; it’s a gathering of minds that drives our industry forward. If you’re passionate about design and verification, DVCon U.S. 2025 is an event you cannot miss.

I look forward to seeing you there February 24-27 at the DoubleTree in San Jose.

More to Explore at DVCon 2025 with Siemens

Join Siemens EDA at DVCon 2025 for an exclusive luncheon presentation on February 25th, from 12:30 PM to 1:30 PM, where industry leaders will break down the biggest challenges shaping today’s verification landscape and how Siemens is addressing these challenges.

Check out all Siemens activities at DVCon:  events.sw.siemens.com/en-US/dvcon-usa

Functional Design and Verification Learning Services

Dave Rich
Principal Trainer

Dave Rich is a principal instructor at Siemens EDA and is responsible for defining and deploying advanced verification methodologies. Most recently, Dave Rich was a Verification Architect in the Product and Solutions Ecosystems team at Siemens EDA, responsible for the Verification Academy’s content and forum discussions. He has over three decades of design and verification experience in simulation and synthesis technologies. He is actively involved in SystemVerilog standardization, serving as Technical Chair of the IEEE 1800 Working Group and on the Design and Verification Conference steering committee.

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.sw.siemens.com/verificationhorizons/2025/02/12/dvcon-2025-a-must-for-hardware-design-and-verification-engineers/