functional verification - Verification Horizons

Siemens EDA at DVCon India 2024: Join Us for an Exciting Lineup!

September 5, 2024

We are thrilled to announce Siemens EDA’s participation in DVCon India 2024, taking place on September 18-19 at the Radisson Blu in Marathahalli, Bangalore. This year’s event promises to be a hub of innovation and knowledge-sharing, and we are excited to be a part of it.

Siemens EDA will be showcasing a range of informative sessions and exhibits designed to help you engineer a smarter future faster.

By Dennis Brophy

2 MIN READ

Jump-Start Your UVM Journey with UVM Framework (UVMF)

September 4, 2024

Bob Oden shares insights on how the Universal Verification Methodology Framework (UVMF) is revolutionizing the verification landscape. UVMF is an advanced toolset that…

By Dennis Brophy

2 MIN READ

Exciting Times Ahead: DVCon Taiwan and RISC-V Taipei Day 2024

September 3, 2024

For the electronic system design community in Taiwan, you have two pivotal events in the world of design verification and…

By Dennis Brophy

2 MIN READ

Portable Stimulus and VIP: Like a Hand in a Glove

August 8, 2024

One of my favorite things about DAC is the ability to share with so many of you some details of…

By Tom Fitzpatrick

2 MIN READ

Verification Challenges and Solutions for Multi-Die Systems (UCIe)

July 29, 2024

Introduction Multi-die systems accelerate the scaling of system functionality, reduce risk, and facilitate the creation of new product variants. However,…

By Vivek Kaliki

2 MIN READ

Simulation is Key in design verification process

The importance of simulation in the pursuit of absolute speed!

April 2, 2024

A casual conversation with an ex-insider of the high frequency trading sector reveals surprising details about simulation and their design-verification process

By Sunil Sahoo

3 MIN READ