pattern matching

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Securing your silicon: Why automated IP integrity is non-negotiable in modern SoC design

December 2, 2025

Ensure IP integrity in your SoC designs. Discover how Calibre IP Checker detects hidden IP modifications, prevents costly re-spins and accelerates tape-out.

By Calibre IC Design & Manufacturing
5 MIN READ

A touchy subject: RF IC layout verification

May 24, 2022

By Neel Natekar Radio frequency (RF) circuitry is an essential component of many of the critical applications we now rely…

By Calibre IC Design & Manufacturing
2 MIN READ
Using Automated Pattern Matching For SRAM Physical Verification

Using Automated Pattern Matching For SRAM Physical Verification

January 17, 2017

By Elven Huang, Mentor Graphics Accurate SRAM IP verification can be tricky, but automated pattern matching can help.

By Calibre IC Design & Manufacturing
6 MIN READ
Synthesis of Design Rules and Patterns

Synthesis of Design Rules and Patterns

August 31, 2016

By Michael White, Mentor Graphics Integrating pattern matching with design verification and process development yields benefits at all nodes. Learn…

By Calibre IC Design & Manufacturing
7 MIN READ
Pattern Matching In Test and Yield Analysis

Pattern Matching In Test and Yield Analysis

August 1, 2016

By Jonathan Muirhead and Geir Eide, Mentor Graphics Analyzing fail data with pattern matching helps companies identify yield limiters faster…

By Calibre IC Design & Manufacturing
4 MIN READ
Pattern Matching in Design Verification

Pattern Matching in Design Verification

June 1, 2016

By Michael White, Mentor Graphics Automated pattern matching can solve a wide range of design verification issues. Are you in…

By Calibre IC Design & Manufacturing
7 MIN READ
How to Use Pattern Matching to Improve Automatic Waiver Management

How to Use Pattern Matching to Improve Automatic Waiver Management

May 5, 2015

By John Ferguson and Jonathan Muirhead, Mentor Graphics Ensuring a known level of quality

By Calibre IC Design & Manufacturing
6 MIN READ
2-5X Productivity Improvement in 14FDSOI Layout Design: STMicroelectronics Experience with Calibre RealTime

2-5X Productivity Improvement in 14FDSOI Layout Design: STMicroelectronics Experience with Calibre RealTime

March 2, 2015

By Atul Bhargava and Mehak Malhotra, STMicroelectronics, India and Srinivas Velivala, Mentor Graphics Rather than just fixing DRC errors as…

By Calibre IC Design & Manufacturing
6 MIN READ
The Route to Faster Physical Verification and Better Designs

The Route to Faster Physical Verification and Better Designs

February 24, 2015

By Nancy Nguyen and Jean-Marie Brunet, Mentor Graphics Using the most accurate and up-to-date signoff engine instead of a limited…

By Calibre IC Design & Manufacturing
4 MIN READ