Boost simulation results with powerful selective net extraction with Calibre xACT

By Karen Chow In advanced integrated circuit (IC) design, post-layout parasitic extraction is crucial for accurate performance analysis and optimization….

Calibre xACT takes a hybrid approach to parasitic extraction

By Mark Tawfik Parasitic extraction plays a pivotal role in the design and optimization of integrated circuits (ICs). Extraction involves…

Mastering parasitic extraction at the 3 nm process node

By Dilan Heredia and Karen Chow Designing integrated circuits (ICs) for the 3 nm process node poses challenges never seen…

TSMC OIP Forum celebrates collaboration and innovation…and we have the awards to prove it!

TSMC’s Open Innovation Platform® (OIP) brings together the creative thinking of customers and partners with the common goal of shortening…

Parasitic extraction for touchscreen designs

Parasitic extraction for touchscreen designs

By Mohamed ElRefaee, Mentor Graphics Accurate parasitic extraction of touchscreens is essential for ensuring the high-quality performance the market demands

Parasitic Extraction of FinFET-based Memory Cells

Parasitic Extraction of FinFET-based Memory Cells

By Karen Chow, Mentor Graphics Accurate and efficient FinFET characterization requires a parasitic extraction tool that can apply different extraction…

Designing and Testing FinFet-based IC Designs

Designing and Testing FinFet-based IC Designs

By Carey Robertson and Steve Pateras, Mentor Graphics Are your processes ready for finFETs?