Calibre xACT

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Boost simulation results with powerful selective net extraction with Calibre xACT

October 1, 2025

By Karen Chow In advanced integrated circuit (IC) design, post-layout parasitic extraction is crucial for accurate performance analysis and optimization….

By Calibre IC Design & Manufacturing
9 MIN READ

Calibre xACT takes a hybrid approach to parasitic extraction

May 12, 2025

By Mark Tawfik Parasitic extraction plays a pivotal role in the design and optimization of integrated circuits (ICs). Extraction involves…

By Calibre IC Design & Manufacturing
4 MIN READ

Mastering parasitic extraction at the 3 nm process node

February 12, 2024

By Dilan Heredia and Karen Chow Designing integrated circuits (ICs) for the 3 nm process node poses challenges never seen…

By Calibre IC Design & Manufacturing
5 MIN READ

TSMC OIP Forum celebrates collaboration and innovation…and we have the awards to prove it!

November 29, 2021

TSMC’s Open Innovation Platform® (OIP) brings together the creative thinking of customers and partners with the common goal of shortening…

By Calibre IC Design & Manufacturing
2 MIN READ
Parasitic extraction for touchscreen designs

Parasitic extraction for touchscreen designs

October 6, 2015

By Mohamed ElRefaee, Mentor Graphics Accurate parasitic extraction of touchscreens is essential for ensuring the high-quality performance the market demands

By Calibre IC Design & Manufacturing
5 MIN READ
Parasitic Extraction of FinFET-based Memory Cells

Parasitic Extraction of FinFET-based Memory Cells

June 11, 2015

By Karen Chow, Mentor Graphics Accurate and efficient FinFET characterization requires a parasitic extraction tool that can apply different extraction…

By Calibre IC Design & Manufacturing
6 MIN READ
Designing and Testing FinFet-based IC Designs

Designing and Testing FinFet-based IC Designs

March 31, 2015

By Carey Robertson and Steve Pateras, Mentor Graphics Are your processes ready for finFETs?

By Calibre IC Design & Manufacturing
4 MIN READ