Latest posts

Early circuit verification can get you to tapeout faster…here’s how

For the last few years, it’s been hard to see design teams struggling to meet tapeout schedules caused by increasing…

Automated ESD protection verification for 2.5-3D ICs is now a reality

Got the mid-winter blahs? The post-New Year letdown? Looking for something to rev you up? How about an automated method…

Stochasticity of the input current is an important factor in accurate EM assessment for on-chip power delivery networks

At every conference, there is always that anticipatory moment just before the coveted “Best Paper” awards are announced. After all,…

2021: Time to simplify your life (or at least your workload)?

Everyone makes resolutions for a better life at the start of a new year – why not resolve to make…

GLOBALFOUNDRIES and Mentor Launch a New Innovative DRC+ Hotspot Solution using Machine Learning in Calibre

By Shelly Stalnaker – Mentor, A Siemens Business I recently had the chance to attend an on-demand webinar introducing the…

Mentor receives 2020 TSMC OIP Partner of the Year awards for EDA solutions

By Shelly Stalnaker – Mentor, A Siemens Business While the structure of the TSMC OIP Ecosystem Forum had to change…

Verification run configurations stressing you out? Automate them!

By Srinivas Velivala – Mentor, A Siemens Business As all new IC verification engineers learn very quickly, there is far…

SAFE at home! Attending the Samsung SAFE forum in 2020

By Shelly Stalnaker – Mentor, A Siemens Business Samsung is going virtual with their 2020 SAFE forum, and Mentor, a…

Do you have a reliable automated waiver process for reliability verification?

By Dina Medhat – Mentor, A Siemens Business Design rule waivers Maybe a design rule that made sense at 22nm…