Dina Medhat, Mentor Graphics ESD protection is critical, but difficult to verify. Using voltage propagation and logic-aware checks can help
By Matthew Hogan, Mentor Graphics Latch-up detection is challenging. Learn how automated LUP checks help you find and eliminate LUP…
By Yousry Elmaghraby, Mentor Graphics Choosing the best PEX method for your full-chip or SoC design is essential. But how…
By David Abercrombie and Alex Pearson, Mentor Graphics Applying ECOs to multipatterned designs can be a nightmare, unless you plan…
By David Abercrombie, Mentor Graphics How do you know which double patterning flow to use?
