Optimizing design implementation with Calibre LEF/DEF technology

By James Paris and Armen Asatryan Ever hear the saying “When all you have is a hammer, everything looks like…

Innovations in physical verification tools and technologies keep the IC industry moving forward

By John Ferguson A few years ago, I was invited to present a paper discussing the advances in physical verification…

Accelerating IC design time to market with Calibre in the cloud

By Michael White When you’re flying, it’s fun to look out the window and see clouds from “the other side.”…

Ease on down the road…why “ease of use” is the next big thing in EDA, and how we get there

Ease of use is an important issue when enhancing product functionality and introducing new technology. Calibre Design Systems considers ease…

The “next” technology node: ready or not, here it comes

By Shelly Stalnaker For years, decades even, the semiconductor industry has lived by the process node, which was originally named…

IC package designers—looking for multi-die, system-level signoff verification?

By Shelly Stalnaker Ever tried a food sample when you were shopping…not just because it’s free food (!), but because…

Package verification just took a big step forward…

By Armen Asatryan and John Ferguson Over a decade ago, Calibre Design Solutions moved early into defining and building physical…

Want to know what went on at the TSMC OIP Forum this year? Here’s the inside scoop…

TSMC customers and partners always look forward to the annual TSMC Open Innovation Platform® (OIP) Forums. Here, they get the…

Fix first, finish faster!

By James Paris A few years ago, I came across some plans to build a simple bookshelf that would fit…