Not yet a fan of fan-out? Why you should be!

By John Ferguson, Mentor Graphics FO-WLP combines multiple die from heterogeneous processes into a compact…

Pattern Matching in Design Verification

By Michael White, Mentor Graphics Automated pattern matching can solve a wide range of design…

When and How Should I Color My DP Layout?

By David Abercrombie, Mentor Graphics Automated DP coloring solutions minimize DP errors. But when is…

Five Steps to Double Patterning Debug Sucess

By David Abercrombie, Mentor Graphics Shhhh…David Abercrombie’s revealing the secrets of successful DP debugging!…

More Than Moore: Finally Crossing the Chasm?

By Michael White, Mentor Graphics Will fan-out wafer-level packaging be the impetus that pushes 3D-IC…

Resetting Expectations on Multi-Patterning Decomposition and Checking Part 2

By David Abercrombie, Mentor Graphics Triple and quadruple patterning can baffle even the most experienced…

Resetting Expectations on Multi-Patterning Decomposition and Checking

By David Abercrombie, Mentor Graphics Some common misconceptions about multi-patterning processes and just how they…

Design Rule Checking for Silicon Photonics

By Ruping Cao, Mentor Graphics Verifying silicon photonics designs requires new techniques, like equation-based DRC…

Reported Death of Moore’s Law Premature?

By Michael White, Mentor Graphics Is Moore’s Law dying? A look at the latest process…