Verification

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ARM® Techcon Paper Report: How Microsoft Saved 4 Man-Months Meeting Their Coverage Closure Goals Using Automated Verification Management & Formal Apps

ARM® Techcon Paper Report: How Microsoft Saved 4 Man-Months Meeting Their Coverage Closure Goals Using Automated Verification Management & Formal Apps

November 17, 2014

Few verification tasks are more challenging than trying to achieve code coverage goals for a complex system that, by design,…

By Joe Hupcey III
4 MIN READ
The FPGA Verification Window Is Open

The FPGA Verification Window Is Open

May 7, 2014

My Feb. 4 post introduced Mentor Graphics’ three-step FPGA verification process intended to help design teams get out of the…

By Danny Santoro
< 1 MIN READ
DVCon–The FREE Side

DVCon–The FREE Side

February 27, 2014

Psst!  I’ll let you in on some news… While DVCon calls the free portion of the conference “Exhibits Only,” let…

By Dennis Brophy
2 MIN READ
Just because FPGAs are programmable doesn’t mean verification is dead

Just because FPGAs are programmable doesn’t mean verification is dead

February 4, 2014

Marketing teams at FPGA vendors have been busy as the silicon nanometer geometry race escalates. Altera is “delivering the unimaginable”…

By Danny Santoro
2 MIN READ
Happy Halloween from ARM TechCon

Happy Halloween from ARM TechCon

October 30, 2013

MENTOR GRAPHICS AT ARM TECHCON This week ARM® TechCon® 2013 is being held at the Santa Clara Convention Center from…

By Mark Olen
2 MIN READ
A Decade of SystemVerilog: Unifying Design and Verification?

A Decade of SystemVerilog: Unifying Design and Verification?

September 19, 2013

It’s hard for me to believe that SystemVerilog 3.1 was released just over 10 years ago. The 3.1 version added…

By Dave Rich
2 MIN READ
Part 8: The 2012 Wilson Research Group Functional Verification Study

Part 8: The 2012 Wilson Research Group Functional Verification Study

August 5, 2013

Language and Library Trends This blog is a continuation of a series of blogs that present the highlights from the…

By Harry Foster
4 MIN READ
Part 7: The 2012 Wilson Research Group Functional Verification Study

Part 7: The 2012 Wilson Research Group Functional Verification Study

July 29, 2013

Testbench Characteristics and Simulation Strategies This blog is a continuation of a series of blogs that present the highlights from…

By Harry Foster
4 MIN READ
Walking in the Desert or Drinking from a Fire Hose?

Walking in the Desert or Drinking from a Fire Hose?

July 26, 2013

You don’t need a graphic like the one below to know that multi-core SoC designs are here to stay.  This one…

By Mark Olen
3 MIN READ