Requirements set for Accellera UVM-EA (Early Adopter) Release This was a productive week for Accellera. After months of discussions, the…
At a recent SystemVerilog requirements gathering meeting,I was quite amused to see “deprecating features” come out as one of the…
Download OVM 2.2.1 from Verification Academy An important OVM update is now available for download and production use. Several bugs…
For those of you who didn’t make it to DVCon this year, you missed one of the things that makes…
EDA & VLSI Standards Focus Meeting on 12 March 2010 As part of its continuing program to reach out to…
… To Advance Technology for Humanity It is a humbling honor to have been elected chair of the IEEE Standards…
The SystemVerilog IEEE 1800-2009 Language Reference Manual (LRM) was published a few months ago with an unprecedented 472 updates. That’s…
Duolog Joins Agnisys to Add Reg Pac Support The OVM 1.0 Register Package has had a lot of interest since…
SystemC User Group Meeting & DVCon Tutorial Featured The Open SystemC Initiative (OSCI), an independent non-profit organization dedicated to support…
