The DASC Participates in IEEE Standards Association Gala Event The IEEE Computer Society Design Automation Standards Committee (DASC) participated in…
Adopting SystemVerilog can be challenging to some, and learning the UVM at the same time might seem overwhelming. There is…
IEEE Announces Revision to IEEE 1666™ – Adds Transaction-Level Modeling Support A significant step forward to address standards for advanced…
Creating Confidence Globally Today, 14 October 2011, is the day the world celebrates standards. The leadership of the IEC, ISO…
Legacy’s Luster Lost As a follow-on to my last blog, where I shared information about Harry Foster speaking live about…
Is Legacy Holding You Back? Harry Foster, Mentor’s Verification Chief Scientist, will take center stage to give live presentations on…
I’m excited to announce that our second UVM Recipe-of-the-Month Webinar, “Sequence Layering,” will be presented on Thursday, September 15, at…
Who Doesn’t Like Faster? In my last blog post I introduced new technology called Intelligent Testbench Automation (“iTBA”). It’s generating…
Historical Perspective In my early days of standards development, I was intrigued how a standard went from the development phase…
