Design Trends In my previous blog, I introduced the 2010 Wilson Research Group Functional Verification Study (click here). The objective of…
Study Overview In 2002 and 2004, Ron Collett International, Inc. conducted its well known ASIC/IC functional verification studies, which…
Wally Rhines DVCon 2011 Keynote Highlights Survey on Verification Languages OK, maybe it is not the Dawning of the Age…
by Rich Edelman and Dave Rich Introduction The UVM is a derivative of OVM 2.1.1. It has similar use model,…
Open SystemC Initiative Tackles the Future If you have examined the DVCon program, you know that it is a week…
By now you’ve probably heard that Accellera approved the Universal Verification Methodology Standard (UVM1.0) today. This announcement is the culmination…
Somebody asked me a simple question: Why do need two different macros (`ovm_object_utils and `ovm_object_param_utils) to register classes with the…
IEEE Standards Association Hosts Design Automation Standardization Workshops in Bangalore & Delhi I, along with several other individuals, will participate…
Standard Co-Emulation Modeling Interface (SCE-MI) 2.1 Improves Verification Productivity The Accellera Interface Technical Subcommittee (ITC) completed version 2.1 of the…
