IEEE Honors Siemens Employees for Dedication to Standards Development

Annually, the IEEE Standards Association (IEEE SA) recognizes outstanding participation across a variety of technical areas of standards development, leadership,…

Let’s meet in Munich at DVCon Europe 2023

DVCon Europe celebrates its 10th anniversary this year!  What started as a small conference to complement DVCon in the United…

osmosis 2023

osmosis – our annual event for formal verification users – is coming-up on November 16!

Attention anyone interested in Formal Verification: We are thrilled to invite all formal verification enthusiasts to osmosis 2023, the premier…

Selective hardening in space applications

Introduction The space sector continues to experience disruption as innovation drives the creation of new business models across government and…

Starting Your UVM Simulation

Starting Your UVM Simulation

Introduction What happens when you start your simulation with a UVM test bench? Where should you put the uvm_config_db::set() calls…

A Hitchhiker’s Guide to DVCon US ’23

Where can you improve your verification skills? In March 2023 I attended DVCon US, the Verification and Design Conference in…

Decoding LLM Hallucinations: Insights and Taming them for EDA Applications

What are Large Language Model’s hallucinations. LLMs will be powerful EDA productivity tool once we know what caused it and how to deal with their adverse effects.

Siemens EDA at the 60th DAC

Please mark your calendars for the highly anticipated 60th anniversary Design Automation Conference (DAC). The 60th DAC will take place…

UVM Debug? Just nature doing what it does

Bent Tools and other Horrors From the Garden and UVM Debug – or Are You Still Debugging with $display?

I can’t take credit for the great flowers in the garden. It’s the tremendous rain we’ve had in California this…