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DVCon India 2025 - 10th Anniversary

Siemens at DVCon India 2025: Driving the Future of Design and Verification

August 26, 2025

DVCon India 2025, taking place on September 10–11 at the Radisson Blu, Marathahalli, Bengaluru, will mark a special milestone—its 10th anniversary. Over the past decade, DVCon India has grown into one of the region’s most influential conferences for design and verification professionals. Siemens will be prominently featured across vision talks, technical papers, posters, and workshops, showcasing its leadership in AI-driven EDA, hardware-assisted verification, and formal methodologies.

By Dennis Brophy
2 MIN READ

Reminder: DVCon U.S. 2026 Call for Papers – Sept 7th Deadline Approaching!

August 25, 2025

The DVCon U.S. 2026 Call for Papers deadline is Sunday, September 7th at 11:59 PM. Don’t miss your chance to share your expertise…

By Dave Rich
< 1 MIN READ

Siemens EDA at FMS 2025 – Shaping the Future of Memory and Storage

July 31, 2025

We’re excited to connect with fellow innovators, engineers, and industry leaders at FMS 2025. Whether you’re attending our sessions or stopping by Booth #1140, we look forward to sharing the latest technical advancements in verification IP, system-level validation, and memory and interconnect technologies.

By Dennis Brophy
2 MIN READ

Industrial-Grade AI in EDA: From Promise to Practice — A Siemens Panel at DAC 2025

June 17, 2025

Industrial-Grade AI in EDA

By Harry Foster
2 MIN READ
First-Silicon Success

Generative AI: The Hype, The Hope, The Hard Truths — And the Debate at DAC

June 17, 2025

The semiconductor industry is no stranger to bold claims. But few topics today spark more debate — or more genuine…

By Harry Foster
2 MIN READ

From Rule-Based Beginnings to AI-Driven Design: Tracing the Evolution of AI in EDA

June 3, 2025

As we gear up for the 62nd Design Automation Conference (DAC) in San Francisco, one of the most anticipated events…

By Harry Foster
3 MIN READ
User2User

Closing the Gap in Software Skills for Verification Engineers

April 17, 2025

I’m excited to announce next month’s U2U (User-to-User) meeting, followed by a crucial technical training session that no hardware verification…

By Dave Rich
2 MIN READ

Accellera announces fee-free availability of IEEE Std. 1801™-2024

March 19, 2025

Accellera announced the latest revision of the IEEE Standard for Design and Verification of Low-Power Energy-Aware Electronic Systems, also known…

By Dennis Brophy
3 MIN READ

GOMACTech 2025 Preview: Improving Productivity with Parallel Simulation (Poster P.9)

March 10, 2025

Field Programmable Gate Arrays (FPGAs) continue to be a critical part of system designs, and their complexity grows as new…

By Joe Hupcey III
2 MIN READ